TDA8841

Manufacturer Part NumberTDA8841
DescriptionI2C-bus controlled PAL/NTSC TV processor
ManufacturerPhilips Semiconductors
TDA8841 datasheet
 


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Philips Semiconductors
2
I
C-bus controlled PAL/NTSC/SECAM TV
processors
NUMBER
PARAMETER
(
BEAM CURRENT LIMITING
CONTINUED
C.7.4
voltage difference for full
brightness reduction
C.7.5
internal bias voltage
C.7.6
detection level vertical guard
C.7.7
minimum input current to
activate the guard circuit
C.7.8
maximum allowable current
;
53
BLUE STRETCH
NOTE
C.8.1
decrease of small signal gain for
the red and green channel
C.8.2
decrease of small signal gain for
the red channel
C.8.3
decrease of small signal gain for
the green channel
2
I
C-BUS CONTROL INPUT/OUTPUT (SDA/SCL)
B.1.1
input voltage level
B.1.2
low-level input voltage
B.1.3
high-level input voltage
B.1.4
low-level input current
B.1.5
high-level input current
B.1.6
low-level output voltage
Notes
1. On set AGC.
2. This parameter is not tested during production and is just given as application information for the designer of the
television receiver.
3. Loop bandwidth BL = 60 kHz (natural frequency fN = 15 kHz; damping factor d = 2; calculated with top sync level as
FPLL input signal level).
4. The IF-PLL demodulator uses an internal VCO (no external LC-circuit required) which is calibrated by means of a
digital control circuit which uses the X-tal frequency of the colour decoder as a reference. The required IF frequency
for the various standards is set via the I
resulting IF frequency is very accurate with a deviation from the nominal value of less than 25 kHz.
5. This parameter is not tested during production but is guaranteed by the design and qualified by means of matrix
batches which are made in the pilot production period.
6. Measured at 10 mV (RMS) top sync input signal.
7. So called projected zero point, i.e. with switched demodulator.
8. Measured in accordance with the test line given in Fig.14. For the differential phase test the peak white setting is
reduced to 87%.
The differential gain is expressed as a percentage of the difference in peak amplitudes between the largest and
smallest value relative to the subcarrier amplitude at blanking level.
The phase difference is defined as the difference in degrees between the largest and smallest phase angle.
December 16, 1997
CONDITIONS
)
BLS = 1
EBS = 1
EBS = 1
V
= 0 V
i
V
= 5.5 V
i
SDA, I
= 3 mA
L
2
C-bus (IFA-IFC bits in sub-address 15H). When the system is locked the
43
Tentative Device Specification
TDA884X/5X-N2 series
MIN.
TYP.
MAX.
UNIT
1
V
3.3
V
3.65
V
100
A
1
mA
14
%
22
%
8
%
0
5.5
V
1.5
V
3.5
V
-10
A
10
A
0.4
V