TE28F640J3A-150

Manufacturer Part NumberTE28F640J3A-150
DescriptionTE28F640J3A-150Intel StrataFlash Memory (J3)
ManufacturerIntel Corporation
TE28F640J3A-150 datasheet
 
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Page 7/72:

Introduction

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1.0

Introduction

This document describes the Intel StrataFlash
device features, operations, and specifications.
1.1
Nomenclature
AMIN:
AMIN = A0 for x8
AMIN = A1 for x16
AMAX:
32 Mbit
64 Mbit
128 Mbit
256 Mbit
Block:
A group of flash cells that share common erase circuitry and erase simultaneously
Clear:
Indicates a logic zero (0)
CUI:
Command User Interface
MLC:
Multi-Level Cell
OTP:
One Time Programmable
PLR:
Protection Lock Register
PR:
Protection Register
PRD
Protection Register Data
Program:
To write data to the flash array
RFU:
Reserved for Future Use
Set:
Indicates a logic one (1)
SR:
Status Register
SRD:
Status Register Data
VPEN:
Refers to a signal or package connection name
V
:
Refers to timing or voltage levels
PEN
WSM:
Write State Machine
ECR:
Extended Configuration Register
XSR:
eXtended Status Register
1.2
Conventions
0x:
Hexadecimal prefix
0b:
Binary prefix
k (noun):
1,000
M (noun):
1,000,000
Nibble
4 bits
Byte:
8 bits
Word:
16 bits
Kword:
1,024 words
Kb:
1,024 bits
KB:
1,024 bytes
Mb:
1,048,576 bits
MB:
1,048,576 bytes
Brackets:
Square brackets ([]) will be used to designate group membership or to define a
group of signals with similar function (i.e., A[21:1], SR[4,1] and D[15:0]).
Datasheet
®
Memory (J3) device. It includes a description of
AMAX = A21
AMAX = A22
AMAX = A23
AMAX = A24
256-Mbit J3 (x8/x16)
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