KM416C254DT-5 Samsung, KM416C254DT-5 Datasheet

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KM416C254DT-5

Manufacturer Part Number
KM416C254DT-5
Description
256K x 16Bit CMOS dynamic RAM with extended data out, Vcc=5.0V, 50ns, 8ms refresh period
Manufacturer
Samsung
Datasheet
• Performance Range
KM416C254D, KM416V254D
This is a family of 262,144 x 16 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random access
of memory cells within the same row. Power supply voltage(+5.0V or +3.3V), Access time (-5,-6 or -7), power consumption(Normal or
Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-
only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode
DRAM family is fabricated using Samsung s advanced CMOS process to realize high band-width, low power consumption and high reli-
ability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines.
FEATURES
• Part Identification
• Active Power Dissipation
• Refresh Cycles
Speed
C254D
V254D
-5
-6
-7
Part
NO.
- KM416C254D/DL (5V, 512 Ref.)
- KM416V254D/DL (3.3V, 512 Ref.)
Speed
-5
-6
-7
50ns
60ns
70ns
t
RAC
3.3V
V
5V
CC
3.3V(512 Ref.)
15ns
15ns
20ns
t
CAC
Refresh
cycle
255
235
256K x 16Bit CMOS Dynamic RAM with Extended Data Out
512
-
104ns
124ns
84ns
t
RC
Normal
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.
8ms
Refresh period
20ns
25ns
30ns
t
5V(512 Ref.)
HPC
605
495
440
Unit : mW
128ms
Remark
5V/3.3V
5V/3.3V
5V only
L-ver
DESCRIPTION
A0~A8
UCAS
LCAS
RAS
W
FUNCTIONAL BLOCK DIAGRAM
• Extended Data Out Mode operation
• 2 CAS Byte/Wrod Read/Write operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Available in 40-pin SOJ 400mil and 44(40)-pin
• Triple +5V 10% power supply (5V product)
• Triple +3.3V 0.3V power supply (3.3V product)
packages
Control
Clocks
Row Address Buffer
Col. Address Buffer
Refresh Counter
Refresh Control
Refresh Timer
VBB Generator
Column Decoder
Memory Array
Row Decoder
262,144 x16
Cells
CMOS DRAM
Vcc
Vss
Data out
Data out
Data in
Data in
Lower
Buffer
Lower
Buffer
Upper
Buffer
Upper
Buffer
DQ0
DQ7
OE
DQ15
DQ8
to
to

Related parts for KM416C254DT-5

KM416C254DT-5 Summary of contents

Page 1

... Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This 256Kx16 EDO Mode DRAM family is fabricated using Samsung s advanced CMOS process to realize high band-width, low power consumption and high reli- ability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines. ...

Page 2

KM416C254D, KM416V254D •KM416C/V254DJ DQ0 3 DQ1 4 DQ2 5 DQ3 DQ4 8 DQ5 9 DQ6 10 DQ7 11 N RAS 15 N ...

Page 3

KM416C254D, KM416V254D ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage Temperature Power Dissipation Short Circuit Output Current * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" ...

Page 4

KM416C254D, KM416V254D DC AND OPERATING CHARACTERISTICS Symbol Power I Don t care CC1 I Don t care Don t care CC2 I Don t care CC3 I Don t care CC4 Normal I Don t care CC5 L I Don ...

Page 5

KM416C254D, KM416V254D CAPACITANCE (T = Parameter Input capacitance [A0 ~ A8] Input capacitance [RAS, UCAS, LCAS, W, OE] Output capacitance [DQ0 - DQ15] AC CHARACTERISTICS ( Test condition (5V device =5.0V 10%, Vih/Vil=2.4/0.8V, ...

Page 6

KM416C254D, KM416V254D AC CHARACTERISTICS (Continued) Parameter Data set-up time Data hold time Refresh period (Normal) Refresh period (L-ver) CAS to W delay time RAS to W delay time Column address to W delay time CAS precharge to W delay time ...

Page 7

KM416C254D, KM416V254D NOTES An initial pause of 200us is required after power-up followed by any 8 RAS-only refresh or CAS-before-RAS refresh cycles 1. before proper device operation is achieved. V (min) and V (max) are reference levels for measuring timing ...

Page 8

KM416C254D, KM416V254D are referenced to the earlier CAS rising edge. 13. ASC CAH t 14. is specified from the last CAS rising edge in the previous cycle to the first CAS falling edge in the next cycle. ...

Page 9

KM416C254D, KM416V254D WORD READ CYCLE RAS UCAS LCAS ASR ADDRESS ...

Page 10

KM416C254D, KM416V254D LOWER BYTE READ CYCLE NOTE : D = OPEN RAS UCAS LCAS ASR ...

Page 11

KM416C254D, KM416V254D UPPER BYTE READ CYCLE NOTE : D = OPEN RAS CRP UCAS CRP LCAS ASR V ...

Page 12

KM416C254D, KM416V254D WORD WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS UCAS LCAS ASR ...

Page 13

KM416C254D, KM416V254D LOWER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V - ...

Page 14

KM416C254D, KM416V254D UPPER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V - ...

Page 15

KM416C254D, KM416V254D WORD WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V - ...

Page 16

KM416C254D, KM416V254D LOWER BYTE WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS UCAS LCAS ...

Page 17

KM416C254D, KM416V254D UPPER BYTE WRITE CYCLE ( OE CONTROLLED WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS V ...

Page 18

KM416C254D, KM416V254D WORD READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ROW ...

Page 19

KM416C254D, KM416V254D LOWER-BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ROW ...

Page 20

KM416C254D, KM416V254D UPPER-BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS ASR ROW ...

Page 21

KM416C254D, KM416V254D HYPER PAGE MODE WORD READ CYCLE RAS CRP UCAS CRP LCAS ASR RAH ...

Page 22

KM416C254D, KM416V254D HYPER PAGE MODE LOWER BYTE READ CYCLE RAS CRP UCAS LCAS ASR RAH ROW ...

Page 23

KM416C254D, KM416V254D HYPER PAGE MODE UPPER BYTE READ CYCLE RAS CRP UCAS CRP LCAS ASR ...

Page 24

KM416C254D, KM416V254D HYPER PAGE MODE WORD WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ...

Page 25

KM416C254D, KM416V254D HYPER PAGE MODE LOWER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP ...

Page 26

KM416C254D, KM416V254D HYPER PAGE MODE UPPER BYTE WRITE CYCLE ( EARLY WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP ...

Page 27

KM416C254D, KM416V254D HYPER PAGE MODE WORD READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS RAD t ...

Page 28

KM416C254D, KM416V254D HYPER PAGE MODE LOWER BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS RAD ...

Page 29

KM416C254D, KM416V254D HYPER PAGE MODE UPPER BYTE READ - MODIFY - WRITE CYCLE RAS CRP UCAS CRP LCAS RAD ...

Page 30

KM416C254D, KM416V254D HYPER PAGE READ AND WRITE MIXED CYCLE RAS UCAS LCAS t RAD RAH t ASR ...

Page 31

KM416C254D, KM416V254D RAS - ONLY REFRESH CYCLE NOTE : Don t care OPEN OUT RAS CRP UCAS CRP ...

Page 32

KM416C254D, KM416V254D HIDDEN REFRESH CYCLE ( READ ) RAS CRP UCAS CRP LCAS ASR ADDRESS ...

Page 33

KM416C254D, KM416V254D HIDDEN REFRESH CYCLE ( WRITE ) NOTE : D = OPEN OUT RAS CRP UCAS CRP LCAS ...

Page 34

KM416C254D, KM416V254D CAS-BEFORE-RAS REFRESH COUNTER TEST CYCLE RAS CSR UCAS CSR LCAS READ ...

Page 35

KM416C254D, KM416V254D CAS - BEFORE - RAS SELF REFRESH CYCLE NOTE : Don t care RAS UCAS LCAS V - ...

Page 36

KM416C254D, KM416V254D PACKAGE DIMENSION 40 SOJ 400mil #40 #1 0.0375 (0.95) 44(40) TSOP(II) 400mil 0.032 (0.805) 1.041 (26.44) MAX 1.020 (25.92) 1.030 (26.16) 0.026 (0.66) 0.050 (1.27) 0.032 (0.81) 0.015 (0.38) 0.021 (0.53) 0.741 (18.81) MAX 0.721 (18.31) 0.047 (1.20) ...

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