CY62256-70SNI Cypress Semiconductor Corporation., CY62256-70SNI Datasheet

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CY62256-70SNI

Manufacturer Part Number
CY62256-70SNI
Description
CY62256-70SNI256K (32K x 8) Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-05248 Rev. *C
Features
• Temperature Ranges
• High speed: 55 ns and 70 ns
• Voltage range: 4.5V–5.5V operation
• Low active power (70 ns, LL version, Com’l and Ind’l)
• Low standby power (70 ns, LL version, Com’l and Ind’l)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Package available in a standard 450-mil-wide (300-mil
Note:
1.
Logic Block Diagram
body width) 28-lead narrow SOIC, 28-lead TSOP-1,
28-lead reverse TSOP-1, and 600-mil 28-lead PDIP
packages
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
— 275 mW (max.)
— 28 µW (max.)
For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
CE
WE
OE
A
A
A
A
A
A
A
A
A
10
9
8
7
6
5
4
3
2
3901 North First Street
INPUTBUFFER
512 x 512
DECODER
COLUMN
ARRA Y
Functional Description
The CY62256 is a high-performance CMOS static RAM
organized as 32K words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE) and active LOW
output enable (OE) and three-state drivers. This device has an
automatic
consumption by 99.9% when deselected.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O
addressed by the address present on the address pins (A
through A
the device and enabling the outputs, CE and OE active LOW,
while WE remains inactive or HIGH. Under these conditions,
the contents of the location addressed by the information on
address pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
POWER
DOWN
0
through I/O
256K (32K x 8) Static RAM
14
). Reading the device is accomplished by selecting
San Jose
power-down
7
) is written into the memory location
feature,
CA 95134
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
[1]
0
1
2
3
4
5
6
7
reducing
Revised June 25, 2004
408-943-2600
CY62256
the
power
0

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CY62256-70SNI Summary of contents

Page 1

... Document #: 38-05248 Rev. *C 256K (32K x 8) Static RAM Functional Description The CY62256 is a high-performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and three-state drivers. This device has an ...

Page 2

... Product Portfolio Product CY62256 Commercial CY62256L Com’l / Ind’l CY62256LL Commercial CY62256LL Industrial CY62256LL Automotive Pin Configurations Narrow SOIC Top View ...

Page 3

... MHz 5.0V CC CY62256 [4] Ambient Temperature ( ° ° +70 C ° ° – +85 C ° ° – +125 C CY62256−55 CY62256−70 [2] [2] Min. Typ. Max. Min. Typ. 2.4 2.4 0.4 2.2 V 2.2 CC +0.5V –0.5 0.8 –0.5 –0.5 +0.5 –0.5 –0.5 +0.5 –0 ...

Page 4

... Equivalent to: THÉ VENIN EQUIVALENT 639Ω OUTPUT Conditions 3.0V, CE > − 0.3V > Ind’ Auto DATA RETENTION MODE 3.0V V > CDR CY62256 DIP SOIC TSOP RTSOP 75.61 76.56 93.89 93.89 43.12 36.07 24.64 24.64 ALL INPUT PULSES 3.0V 90% 90% 10% GND < 1.77V [6] [2] Min. Typ. ...

Page 5

... DATA VALID , and t is less than t for any given device. LZOE HZWE LZWE and t SD CY62256 Unit Page ...

Page 6

... During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05248 Rev ACE t DOE t LZOE 50% [10, 15, 16 PWE t SD DATA IN [10, 15, 16 SCE DATA t HZOE t HZCE DATA VALID VALID VALID IN CY62256 HIGH IMPEDANCE ICC ISB Page ...

Page 7

... Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS DATA I/O NOTE 17 Document #: 38-05248 Rev. *C [11, 16 DATA t HZWE VALID IN t LZWE CY62256 Page ...

Page 8

... =25° 0.0 1.0 2.0 3.0 OUTPUT VOLTAGE (V) STANDBY CURRENT vs. AMBIENT TEMPERATURE 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 − 125 AMBIENT TEMPERATURE (°C) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 0.0 1.0 2.0 125 OUTPUT VOLTAGE (V) =5.0V 4.0 CY62256 =5. =5.0V IN 105 =5.0V =25°C 3.0 4.0 Page ...

Page 9

... CY62256LL−55SNI CY62256LL−55ZI CY62256LL−55SNE CY62256LL−55ZE CY62256LL−55ZRE 70 CY62256−70SNC CY62256L−70SNC CY62256LL−70SNC CY62256L–70SNI CY62256LL−70SNI CY62256LL−70ZC CY62256LL−70ZI CY62256−70PC CY62256L−70PC CY62256LL−70PC CY62256LL−70ZRI Document #: 38-05248 Rev. *C (continued) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15 ...

Page 10

... Package Diagrams Document #: 38-05248 Rev. *C 28-lead (600-mil) Molded DIP P15 28-lead (300-mil) SNC (Narrow Body) SN28 CY62256 51-85017-A 51-85092-*B Page ...

Page 11

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY62256 51-85071-*G ...

Page 12

... Document Title: CY62256 256K (32K x 8) Static RAM Document Number: 38-05248 Issue REV. ECN NO. Date ** 113454 03/06/02 *A 115227 05/23/02 *B 116506 09/04/02 *C 238448 See ECN Document #: 38-05248 Rev. *C Orig. of Change MGN Change from Spec number: 38-00455 to 38-05248 Remove obsolete parts from ordering info, standardize format ...

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