MC68030RC33 Motorola, MC68030RC33 Datasheet - Page 120

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MC68030RC33

Manufacturer Part Number
MC68030RC33
Description
MC68030RC33ENHANCED 32-BIT MICROPROCESSOR
Manufacturer
Motorola
Datasheet
Table 5-1. Signal Index (Sheet 2 of 2)
Signal Name
Mnemonic
Data Transfer and
DSACK0/
Size Acknowledge
DSACK1
Synchronous
STERM
Termination
Cache Inhibit In
CIIN
Cache Inhibit Out
CIOUT
Cache Burst Request
CBREQ
Cache Burst
CBACK
Acknowledge
Interrupt Priority Level
IPL0–IPL2
Interrupt Pending
IPEND
Autovector
AVEC
Bus Request
Bus Grant
Bus Grant Acknowledge
BGACK
Reset
RESET
Halt
HALT
Bus Error
BERR
Cache Disable
CDIS
MMU Disable
MMUDIS
Pipe Refill
REFILL
Microsequencer Status
STATUS
Clock
CLK
Power Supply
Ground
GND
MOTOROLA
Bus response signals that indicate the requested data transfer operation
is completed. In addition, these two lines indicate the size of the external
bus port on a cycle-by-cycle basis and are used for asynchronous
transfers.
Bus response signal that indicates a port size of 32 bits and that data
may be latched on the next falling clock edge.
Prevents data from being loaded into the MC68030 instruction and data
caches.
Reflects the CI bit in ATC entries or TTx register; indicates that external
caches should ignore these accesses
Indicates a burst request for the instruction or data cache.
Indicates that the accessed device can operate in burst mode.
Provides an encoded interrupt level to the processor.
Indicates that an interrupt is pending.
Requests an autovector during an interrupt acknowledge cycle.
BR
Indicates that an external device requires bus mastership.
BG
Indicates that an external device may assume bus mastership.
Indicates that an external device has assumed bus mastership.
System reset.
Indicates that the processor should suspend bus activity.
Indicates that an erroneous bus operation is being attempted.
Dynamically disables the on-chip cache to assist emulator support.
Dynamically disables the translation mechanism of the MMU.
Indicates when the MC68030 is beginning to fill pipeline.
Indicates the state of the microsequencer
Clock input to the processor.
V
Power supply.
CC
Ground connection
MC68030 USER’S MANUAL
Signal Description
Function
5-3

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