MC68030RC33

Manufacturer Part NumberMC68030RC33
DescriptionMC68030RC33ENHANCED 32-BIT MICROPROCESSOR
ManufacturerMotorola
MC68030RC33 datasheet
 


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Page 315/602:

Variations in Translation Table Structure

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Memory Management Unit
9.5.3 Variations in Translation Table Structure
Many aspects of the MMU translation tree structure are software configurable, allowing the
system designer flexibility to optimize the performance of the MMU for a particular system.
The following paragraphs discuss the variations of the tree structure from the general
structure discussed previously.
9.5.3.1 EARLY TERMINATION AND CONTIGUOUS MEMORY. The MMU provides the
ability to map a contiguous range of the logical address space (an integral number of logical
pages) to an equivalent contiguous physical address range with a single descriptor. This is
done by placing the code for page descriptor ($1) in the descriptor type (DT) field of a
descriptor at a level of the tree that would normally contain a table pointer, thereby deleting
a subtree of the table.
The table search ends when the search encounters a page descriptor, whether or not the
page descriptor is in a page descriptor table at the lowest level of the translation tree.
Termination of the table search by a page descriptor in a pointer descriptor table (i.e., the
MC68030 has not encountered a TIx field of zero) is called an early termination. The
terminating page descriptor is called an early termination page descriptor.
An early termination page descriptor takes the place of many page descriptors in a
translation table. It applies to all pages that would exist on the branch on which the
descriptor has been placed, and on any branches from that branch. An early termination
page descriptor can be used where contiguous pages in physical memory correspond to
contiguous logical pages. If an early termination page descriptor is a long format, the limit
field is applied to the next index field of the logical address. This allows the number of pages
mapped contiguously to be restricted. Refer to 9.1.2 Translation Table Descriptors for
additional information.
If n low-order bits of the logical page address are unused when a page descriptor encoding
is encountered, the single descriptor creates a mapping of a contiguous region of the logical
address space starting at the logical page address (with n unused bits set to zero) to a
contiguous region in the physical address space starting at the page frame base address
PS+n
with a size of 2
bytes.
MOTOROLA
MC68030 USER’S MANUAL
9-27