HYB514256B-70 Infineon Technologies AG, HYB514256B-70 Datasheet

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HYB514256B-70

Manufacturer Part Number
HYB514256B-70
Description
256K x 4bit DRAM
Manufacturer
Infineon Technologies AG
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HYB514256B-70
Manufacturer:
SIEMENS
Quantity:
2 914
Ordering Information
Type
HYB 514256B-50
HYB 514256B-60
HYB 514256B-70
HYB 514256BJ-50
HYB 514256BJ-60
HYB 514256BJ-70
HYB 514256BL-50
HYB 514256BL-60
HYB 514256BL-70
HYB 514256BJL-50
HYB 514256BJL-60
HYB 514256BJL-70
256 K
Low Power 256 K
Advanced Information
Semiconductor Group
262 144 words by 4-bit organization
Fast access and cycle time
50 ns access time
95 ns cycle time (-50 version)
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
Fast page mode cycle time
35 ns (-50 version)
40 ns (-60 version)
45 ns (-70 version)
Low power dissipation
max. 495 mW active (-50 version)
max. 440 mW active (-60 version)
max. 385 mW active (-70 version)
max. 5.5 mW standby
max. 1.1 mW standby for L-version
4-Bit Dynamic RAM
Ordering Code
Q67100-Q1044
Q67100-Q530
Q67100-Q433
Q67100-Q1054
Q67100-Q536
Q67100-Q537
on request
Q67100-Q542
Q67100-Q543
on request
Q67100-Q608
Q67100-Q607
4-Bit Dynamic RAM
Package
P-DIP-20-2
P-DIP-20-2
P-DIP-20-2
P-SOJ-26/20-1
P-SOJ-26/20-1
P-SOJ-26/20-1
P-DIP-20-2
P-DIP-20-2
P-DIP-20-2
P-SOJ-26/20-1
P-SOJ-26/20-1
P-SOJ-26/20-1
55
Single + 5 V ( 10 %) supply with a built-in
generator
Output unlatched at cycle end allows two-
dimensional chip selection
Read-modify-write, CAS-before-RAS
refresh, RAS-only refresh, hidden-refresh
and fast page mode capability
All inputs, outputs and clocks
TTL-compatible
512 refresh cycles/8 ms
512 refresh cycles/64 ms
for L-version only
Plastic Packages:
HYB 514256BL/BJL-50/-60/-70
HYB 514256B/BJ-50/-60/-70
Description
DRAM (access time 50ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
DRAM (access time 50 ns)
DRAM (access time 60 ns)
DRAM (access time 70 ns)
P-DIP-20-2,
P-SOJ-26/20-1
01.95
V
BB

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HYB514256B-70 Summary of contents

Page 1

K 4-Bit Dynamic RAM Low Power 256 K 4-Bit Dynamic RAM Advanced Information 262 144 words by 4-bit organization • Fast access and cycle time • access time 95 ns cycle time (-50 version access ...

Page 2

The HYB 514256B/BJ/BL/BJL is the new generation dynamic RAM organized as 262 144 words by 4-bit. The HYB 514256B/BJ/BL/BJL utilizes CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating margins, both internally and for ...

Page 3

Pin Configuration (top view) P-SOJ-26/20-1 Semiconductor Group HYB 514256B/BL/BJ/BJL-50/-60/-70 P-DIP-20-2 57 256 K 4-DRAM ...

Page 4

Block Diagram Semiconductor Group HYB 514256B/BL/BJ/BJL-50/-60/-70 58 256 K 4-DRAM ...

Page 5

Absolute Maximum Ratings Operating temperature range ......................................................................................... ˚C Storage temperature range......................................................................................– 150 ˚C Soldering temperature ............................................................................................................260 ˚C Soldering time .............................................................................................................................10 s Input/output voltage ........................................................................................................ – Power supply voltage...................................................................................................... – ...

Page 6

DC Characteristics (cont’ ˚ Parameter V Average supply current, fast page mode: CC -60 version -70 version -50 version V (RAS = , CAS, address cycling: IL ...

Page 7

AC Characteristics 4) 13 ˚ Parameter Random read or write cycle time Read-modify-write cycle time Fast page mode cycle time Fast page mode read-modify- write cycle time ...

Page 8

AC Characteristics (cont’ ˚ Parameter Row address setup time Row address hold time Column address setup time Column address hold time Column address to RAS lead time ...

Page 9

AC Characteristics (cont’ ˚ Parameter CAS precharge time (CAS- before-RAS counter test cycle) OE access time RAS hold time referenced to OE Output buffer turn-off delay time ...

Page 10

Notes : 1) All voltages are referenced and I CC1 CC3 CC4 CC6 CC7 3) I and I depend on output loading. Specified values are measured with the output open. ...

Page 11

Waveforms V IH RAS CAS ASR V IH Row Address I/O1-I/O4 (Inputs ...

Page 12

V IH RAS CAS ASR V IH Row Address I/O1-I/O4 (Inputs I/O1-I/O4 ...

Page 13

V IH RAS CAS ASR V IH Row Address RAH I/O1-I/O4 (Inputs ...

Page 14

V IH RAS CAS RAH ASR V IH Row Address I/O1-I/O4 (Inputs ...

Page 15

Fast Page Mode Read-Modify-Write Cycle Semiconductor Group HYB 514256B/BL/BJ/BJL-50/-60/-70 69 256 K 4-DRAM ...

Page 16

V IH RAS CAS RAH t t ASR V IH Row A0-A8 Addr RAD t RCS I/O1-I/O4 IH ...

Page 17

V IH RAS RCD V IH CAS RAH t ASR V IH Row A0-A8 Addr RAD I/O1-I/O4 (Inputs) V ...

Page 18

V IH RAS CAS ASR V IH A0- I/O1-I/O4 (Outputs “H” or “L” RAS-Only Refresh Cycle Semiconductor Group HYB 514256B/BL/BJ/BJL-50/-60/-70 t RAS t RAH Row Address HI-Z ...

Page 19

RAS RPC CAS OEZ CDD V IH I/O1-I/O4 (Inputs ODD V OH ...

Page 20

V IH RAS CAS RAD t RAH t ASR V IH Row A0-A8 Addr RCS I/O1-I/O4 (Inputs) V ...

Page 21

V IH RAS CAS RAD t RAH t ASR V IH Row A0-A8 Addr I/O1-I/O4 (Inputs ...

Page 22

V IH RAS CSR V IH CAS A0- Read Cycle I/O1-I/O4 IH (Inputs I/O1-I/O4 OH (Outputs) ...

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