TP3404V National Semiconductor, TP3404V Datasheet
TP3404V
Available stocks
Related parts for TP3404V
TP3404V Summary of contents
Page 1
... Biphase (Manchester AWG cable the range is at least (6k ft) Block Diagram TRI-STATE is a registered trademark of National Semiconductor Corporation MICROWIRE trademark of National Semiconductor Corporation ...
Page 2
... Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications GNDA GNDD DDA DDD Voltage at Any Li Lo Pin Electrical Characteristics CCA CCD ...
Page 3
Electrical Characteristics CCA CCD A signals are referenced to GND which is the common of GNDA and GNDD (Continued) TIMING SPECIFICATIONS (Continued) Symbol Parameter DIGITAL INTERFACE TIMING f ...
Page 4
Pin Descriptions Pin Pin No Name 1 GNDA Analog Ground or 0V All analog signals are referenced to this pin 15 GNDD Digital Ground 0V It must connect to GNDA with a shortest possible trace This can be done directly ...
Page 5
... Connection Diagram Top View Order Number TP3404V See NS Package Number V28A Functional Description The QDASL contains 4 transceivers each of which can in- teroperate with any of the TP340X family of single-channel DASL transceivers Each QDASL transceiver has its own independent line transmit and receive section timing recov- ...
Page 6
Functional Description (Continued) Pulse shaping is obtained by means of a Digital to Analog Converter followed by a Continuous Smoothing Filter in or- der to limit RF energy and crosstalk while minimizing Inter- Symbol Interference (ISI) Figure 2 shows the ...
Page 7
Functional Description (Continued) ACTIVATION AND LOOP SYNCHRONIZATION Activation (i e power-up and loop synchronization) may be initiated from either end of the loop If the master (QDASL) end is activating the loop it sends normal bursts of scram- bled ‘‘1’’s ...
Page 8
Functional Description (Continued) LINE CONTROL REGISTERS CTRLN Each of the 4 transceivers has a Line Control Register CTRL0 –CTRL3 which provides for control of loop activa- tion Ioopbacks Interrupt enabling and D channel interface enabling Table 3 lists the functions ...
Page 9
Functional Description (Continued) In the same manner the time-slot number should be written into the appropriate TSR registers for receive data at the BO and DO pins TSRB1 is the time-slot assignment for the receive B1 channel TSRB2 is the ...
Page 10
Functional Description (Continued) Byte Note 1 Bipolar Violation does not cause an Interrupt STATUS ...
Page 11
Applications Information (Continued) FIGURE 5 Typical Application 11924 – 7 ...
Page 12
Applications Information (Continued) FIGURE 6 Microwire Control Interface Timing Details FIGURE 7 B Channel Digital Interface Details FIGURE 8 D-Channel Digital Interface Timing Details TL H 11924 – 11924 – 11924 – 8 ...
Page 13
13 ...
Page 14
... National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications Plastic Chip Carrier (V) Order Number TP3404V NS Package Number V28A 2 A critical component is any component of a life ...