DS2404S Dallas Semiconductor, DS2404S Datasheet

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DS2404S

Manufacturer Part Number
DS2404S
Description
DS2404SEconoRAM Time Chip
Manufacturer
Dallas Semiconductor
Datasheet

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FEATURES
§ 4096 bits of nonvolatile dual-port memory
§ 1-Wire
§ 3-wire host interface for high-speed data
§ Unique, factory-lasered and tested 64-bit
§ Memory partitioned into 16 pages of 256-bits
§ 256-bit scratchpad with strict read/write
§ Programmable alarms can be set to generate
§ 16-pin DIP, SOIC and SSOP packages
§ Operating temperature range from -40°C to
§ Operating voltage range from 2.8 to 5.5
ORDERING INFORMATION
DS2404
DS2404S
DS2404B
DESCRIPTION
The DS2404 EconoRAM Time Chip offers a simple solution for storing and retrieving vital data and time
information with minimal hardware. The DS2404 contains a unique lasered ROM, real-time
clock/calendar, interval timer, cycle counter, programmable interrupts and 4096-bits of SRAM. Two
separate ports are provided for communication, 1-Wire and 3-wire. Using the 1-Wire port, only one pin is
required for communication, and the lasered ROM can be read even when the DS2404 is without power.
The 3-wire port provides high speed communication using the traditional Dallas Semiconductor 3-wire
interface. With either interface, a strict protocol for accessing the DS2404 ensures data integrity. Utilizing
backup energy sources, the data is nonvolatile and allows for stand-alone operation.
The DS2404 features can be used to create a stopwatch, alarm clock, time and date stamp, logbook, hour
meter, calendar, system power cycle timer, expiration timer, and event scheduler.
including real time clock/calendar in binary
format, programmable interval timer, and
programmable power-on cycle counter
communication at 16.3k bits per second
communications at 2M bits per second
registration number (8-bit family code + 48-
bit serial number + 8-bit CRC tester) assures
absolute traceability because no two parts are
alike
for packetizing data
protocols ensures integrity of data transfer
interrupts for interval timer, real time clock,
and/or cycle counter
+85°C
Volts
TM
interface for MicroLAN
16-pin DIP
16-pin SOIC
16-pin SSOP
1 of 28
PIN ASSIGNMENT
PIN DESCRIPTION
V
IRQ
RST
DQ
I/O
CLK
NC
GND
V
V
1 Hz
X
VCC
DQ
I/O
CLK
NC
GND
IRQ
RST
CC
BATB
BATO
1
See Mechanical Drawings Section
,X
2
16-PIN SSOP (300 MIL)
16-PIN SOIC (300 MIL)
16-PIN DIP (300 MIL)
EconoRAM Time Chip
1
2
3
4
5
6
7
8
– 2.8 to 5.5 Volts
– Interrupt Output
– 3-Wire Reset Input
– 3-Wire Input/Output
– 1-Wire Input/Output
– 3-Wire Clock Input
– No Connection
– Ground
– Battery Backup Input
– Battery Operate Input
– 1 Hz Output
– Crystal Connections
16
15
14
13
12
11
10
9
VCC
X1
X2
GND
NC
1HZ
VBATO
VBATB
DS2404
020998

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DS2404S Summary of contents

Page 1

... Operating voltage range from 2.8 to 5.5 Volts ORDERING INFORMATION DS2404 16-pin DIP DS2404S 16-pin SOIC DS2404B 16-pin SSOP DESCRIPTION The DS2404 EconoRAM Time Chip offers a simple solution for storing and retrieving vital data and time information with minimal hardware. The DS2404 contains a unique lasered ROM, real-time clock/calendar, interval timer, cycle counter, programmable interrupts and 4096-bits of SRAM ...

Page 2

DETAILED PIN DESCRIPTION PIN SYMBOL 1, IRQ 3 RST I/O 6 CLK 7,12 NC 8,13 GND 9 V BATB 10 V BATO 11 1Hz 14, OVERVIEW The DS2404 has four ...

Page 3

The “Power Control” section provides for two basic power configurations, battery operate mode and V operate mode. The battery operate mode utilizes one supply connected to V may utilize two supplies; the primary supply connects to V DS2404 BLOCK DIAGRAM ...

Page 4

... Figure 3. The polynomial is X Wire Cyclic Redundancy Check is available in Application Note 27, “Understanding and Using Cyclic Redundancy Checks with Dallas Semiconductor iButton Products”. The shift register bits are initialized to zero. Then starting with the least significant bit of the family code, one bit at a time is shifted in ...

Page 5

MEMORY MAP Figure DS2404 020998 ...

Page 6

MEMORY The memory map in Figure 4 shows a page (32 bytes) called the scratchpad and 17 pages called memory. Pages 0 through 15 each contain 32 bytes which make up the 4096-bit SRAM. Page 16 has only 30 bytes ...

Page 7

Alarm Registers The alarm registers for the real-time clock, interval timer, and cycle counter all operate in the same manner. When the value of a given counter equals the value in its associated alarm register, the appropriate flag bit is ...

Page 8

Setting a write protect bit to a logic 1 will permanently write protect the corresponding counter and alarm registers, all write protect bits, and additional bits in the control register. The write protect bits can not be written in a ...

Page 9

The third register (E/ read only register. The first five bits (E4: E0) of this register are called the ending offset. The ending offset is a byte offset within a page. Bit 5 (PF) is the partial byte ...

Page 10

MEMORY FUNCTION FLOW CHART Figure DS2404 020998 ...

Page 11

Read Memory [F0h] The read memory command may be used to read the entire memory. After issuing the command, the user must provide the 2-byte target address. After the two bytes, the user reads data beginning from the target address ...

Page 12

Example 2: Write two data bytes to memory locations 0026h and 0027h (the seventh and eighth byte of page 1). Read entire memory (1-Wire port). MASTER MODE DATA(LSB FIRST ...

Page 13

The write protect bits, once set, permanently write protects their corresponding counter and alarm registers, all write protect bits, and certain control register bits as shown in Figure 7. The time/count registers will continue to count if the oscillator is ...

Page 14

HARDWARE CONFIGURATION Figure 8 TRANSACTION SEQUENCE The protocol for accessing the DS2404 via the 1-Wire port is as follows: § Initialization § ROM Function Command § Memory Function Command § Transaction/Data INITIALIZATION All transactions on the 1-Wire bus begin with ...

Page 15

Skip ROM [CCh] This command can save time in a single drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus ...

Page 16

ROM FUNCTIONS FLOW CHART (1-WIRE PORT ONLY) Figure 9 (See Figure DS2404 020998 ...

Page 17

SIGNALING The DS2404 requires strict protocols to ensure data integrity. The protocol consists of five types of signaling on one line: Reset Sequence with reset pulse and presence pulse, write 0, write 1, Read Data and interrupt pulse. All ...

Page 18

READ/WRITE TIMING DIAGRAM Figure 11 Write-one Time Slot Write-zero Time Slot Read-data Time Slot RESISTOR MASTER DS2404 60 s < t < 120 s SLOT < LOW1 < REC ...

Page 19

Interrupts If the DS2404 detects an alarm condition, it will automatically set the corresponding alarm flag (CCF, ITF or RTF) in the Status Register. If the flag’ s corresponding interrupt bit ( (logic 0) an interrupt condition begins as the ...

Page 20

TYPE 1 INTERRUPT Figure 12 TYPE 1A INTERRUPT (SPECIAL CASE) Figure 13 TYPE 2 INTERRUPT Figure 14 DS2404 DS2404 020998 ...

Page 21

TYPE 2 INTERRUPT (SPECIAL CASE) Figure 15 3-WIRE I/O COMMUNICATIONS The 3–wire bus is comprised of three signals. These are the and the DQ (data) signal. All data transfers are initiated by driving the input low terminates communication. (See Figures ...

Page 22

V Operate Mode (Battery Backed) CC Figure 16 shows the necessary connections for operating the DS2404 in V VCC OPERATE MODE Figure BATB V BATO To always allow communication through the 1-Wire or wire port, the ...

Page 23

Battery Operate Mode Figure 17 shows the necessary connections for operating the DS2404 in Battery Operate mode. BATTERY OPERATE MODE Figure BATB V BATO The V pin is normally connected to any standard 3 V lithium ...

Page 24

DUAL PORT OPERATION The on-chip arbitration logic works on a first-come, first serve principle. Assuming that at one time both ports are idle, the one port that becomes active prior to the other one is granted access. Activity on the ...

Page 25

CRYSTAL PLACEMENT ON PCB Figure 18 3-WIRE WRITE DATA TIMING DIAGRAM Figure 19 3-WIRE READ DATA TIMING DIAGRAM Figure DS2404 020998 ...

Page 26

ABSOLUTE MAXIMUM RATINGS* Voltage on DATA to Ground Operating Temperature Storage Temperature Soldering Temperature This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of ...

Page 27

CAPACITANCE PARAMETER Input Capacitance Output Capacitance I/O (1-Wire) RESISTANCES PARAMETER Resistance to Ground RST DQ Resistance to Ground CLK Resistance to Ground AC ELECTRICAL CHARACTERISTICS: 3-WIRE PORT PARAMETER Data to CLK Setup CLK to Data Hold CLK to Data Delay ...

Page 28

NOTES: 1. All voltages are referenced to ground 2. 0.8V with 10 ns maximum rise and fall time 2.4V and V = 0.4V, respectively. DQH DQL 4. Load capacitance ...

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