K6X4016T3F-TB55 Samsung, K6X4016T3F-TB55 Datasheet
K6X4016T3F-TB55
Related parts for K6X4016T3F-TB55
K6X4016T3F-TB55 Summary of contents
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... K6X4016T3F Family Document Title 256Kx16 bit Low Power and Low Voltage CMOS Static RAM Revision History Revision No History 0.0 Initial draft 0.1 Revised - Added Commercial product - Deleted 44-TSOP2-400R Package Type. - Added 55ns product(@ 3.0V~3.6V) 1.0 Finalized Revised - Changed I (Operating power supply current) from 4mA to 2mA ...
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... SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The K6X4016T3F families are fabricated by SAMSUNG s advanced CMOS process technology. The families support var- ious operating temperature range and have 44-TSOP2 pack- age type for user flexibility of system design. The families also support low data retention voltage for battery back-up operation with low data retention current ...
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... K6X4016T3F Family PRODUCT LIST Commercial Products(0~70 C) Part Name Function 1) 44-TSOP2-F, 55ns, LL K6X4016T3F-TB55 44-TSOP2-F, 70ns, LL K6X4016T3F-TB70 44-TSOP2-F, 85ns, LL K6X4016T3F-TB85 1. Operating voltage range is 3.0~3.6V FUNCTIONAL DESCRIPTION ...
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... K6X4016T3F Family RECOMMENDED DC OPERATING CONDITIONS Item Supply voltage Ground Input high voltage Input low voltage Note: 1. Commercial Product otherwise specified. A Industrial Product otherwise specified. A Automotive Product: T =-40 to 125 C, otherwise specified Overshoot: V +2.0V in case of pulse width 30ns. ...
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... K6X4016T3F Family AC OPERATING CONDITIONS TEST CONDITIONS ( Test Load and Input/Output Reference) Input pulse level: 0.4 to 2.2V Input rising and falling time: 5ns Input and output reference voltage: 1.5V Output load(see right): C =100pF+1TTL L C =30pF+1TTL L AC CHARACTERISTICS ( V =2.7~3.6V, Commercial product Industrial product Parameter List ...
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... K6X4016T3F Family TIMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address CS UB Data out High-Z NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...
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... K6X4016T3F Family TIMING WAVEFORM OF WRITE CYCLE(1) Address CS UB Data in High-Z Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS UB Data in Data out High-Z (WE Controlled CW( WP(1) t AS( Data Valid t WHZ (CS Controlled AS(3) CW( WP( ...
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... K6X4016T3F Family TIMING WAVEFORM OF WRITE CYCLE(3) Address CS UB Data in High-Z Data out NOTES (WRITE CYCLE wri e occurs during the overlap low CS and low WE. A write begins when CS goes low and WE goes low with asserting for single byte operation or simultaneously asserting UB and LB for double byte operation. A write ends at the earliest transi- tion when CS goes high and WE goes high ...
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... K6X4016T3F Family PACKAGE DIMENSIONS 44 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400F) #44 #1 18.81 MAX. 0.741 18.41 0.10 0.725 0.004 0.35 0.805 0. 0.032 0.014 0.004 #23 11.76 0.20 0.463 0.008 #22 1.00 0.10 0.039 0.004 1.20 MAX. 0.047 0.10 MAX 0.004 0.80 0.0315 9 CMOS SRAM Unit: millimeter(inch) 0~8 0. 0.010 0.45 ~0.75 0.018 ~ 0.030 0. 0.020 Revision 1.0 August 2003 ...