AD8138ARZ-R7 Analog Devices Inc, AD8138ARZ-R7 Datasheet - Page 19

IC AMP DIFF LDIST LP 95MA 8SOIC

AD8138ARZ-R7

Manufacturer Part Number
AD8138ARZ-R7
Description
IC AMP DIFF LDIST LP 95MA 8SOIC
Manufacturer
Analog Devices Inc
Type
ADC Driverr
Datasheet

Specifications of AD8138ARZ-R7

Design Resources
DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7352 (CN0040) DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7356 (CN0041) DC-Coupled, Single-Ended-to-Differential Conversion Using AD8138 and AD7357 (CN0061)
Applications
Data Acquisition
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Number Of Channels
1
Number Of Elements
1
Power Supply Requirement
Single/Dual
Common Mode Rejection Ratio
70dB
Voltage Gain Db
0.028dB
Input Resistance
6@5VMohm
Input Offset Voltage
2.5@5VmV
Input Bias Current
7@5VnA
Single Supply Voltage (typ)
3/5/9V
Dual Supply Voltage (typ)
±3/±5V
Power Supply Rejection Ratio
70dB
Power Dissipation
550mW
Rail/rail I/o Type
No
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
11V
Dual Supply Voltage (min)
±1.4V
Dual Supply Voltage (max)
±5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8138ARZ-R7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD8138ARZ-R7
Quantity:
80
LAYOUT, GROUNDING, AND BYPASSING
As a high speed part, the AD8138 is sensitive to the PCB
environment in which it has to operate. Realizing its superior
specifications requires attention to various details of good high
speed PCB design.
The first requirement is for a good solid ground plane that
covers as much of the board area around the AD8138 as
possible. The only exception to this is that the two input pins
(Pin 1 and Pin 8) should be kept a few millimeters from the
ground plane, and ground should be removed from inner layers
and the opposite side of the board under the input pins. This
minimizes the stray capacitance on these nodes and helps
preserve the gain flatness vs. frequency.
Rev. F | Page 19 of 24
The power supply pins should be bypassed as close as possible
to the device to the nearby ground plane. Good high frequency
ceramic chip capacitors should be used. This bypassing should
be done with a capacitance value of 0.01 μF to 0.1 μF for each
supply. Further away, low frequency bypassing should be provided
with 10 μF tantalum capacitors from each supply to ground.
The signal routing should be short and direct to avoid parasitic
effects. Wherever there are complementary signals, a symmetrical
layout should be provided to the extent possible to maximize
the balance performance. When running differential signals
over a long distance, the traces on the PCB should be close
together or any differential wiring should be twisted together to
minimize the area of the loop that is formed. This reduces the
radiated energy and makes the circuit less susceptible to
interference.
AD8138

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