HDMP-1687 Agilent Technologies, Inc., HDMP-1687 Datasheet
HDMP-1687
Specifications of HDMP-1687
Available stocks
Related parts for HDMP-1687
HDMP-1687 Summary of contents
Page 1
... Functional Description The HDMP-1687 is a four channel SERDES device. HDMP-1687 208-ball TBGA package with four 1.0625/1.25 Gbps serial I/O. This integrated circuit provides a low- cost, low-power, small-form-factor physical-layer solution for multi-link Gigabit Ethernet/Fibre Channel interfaces. This IC may be used to directly drive copper cables may be used to interface with opti- cal transceivers ...
Page 2
TTL parallel I/Os • High-speed phase locked loops • Parallel-to-serial converter • High-speed serial clock and data recovery circuitry • Comma character recognition circuitry for 8B/10B • Character alignment circuitry • Serial-to-parallel converter PARALLEL INPUT LATCH The transmitter accepts ...
Page 3
... MAC HDMP-1687 Figure 1. Typical application using HDMP-1687. FRAME TX[0:3][0:9] MUX TX PLL CAP0 CLOCK CAP1 GENERATOR RFCT RC[0:3][0] RC[0:3][1] FRAME DEMUX RX [0:3][0:9] AND BYTE SYNC SYN [0:3] SYNC Figure 2. Block diagram of HDMP-1687. 3 OUTPUT SELECT LOOPBACK TX CLOCKS INPUT SELECT RX PLL CLOCK RECOVERY RX CLOCKS INPUT SAMPLER SO [0:3]± LOOP SI [0:3]± ...
Page 4
Timing Characteristics for Gigabit Ethernet – Transmitter Section Ambient to +85 C Case Symbol Parameter T Tx Input Setup Time txsetup T Tx Input Hold Time txhold [1] t_txlat Transmitter Latency Note: 1. The ...
Page 5
Timing Characteristics for Gigabit Ethernet – Receiver Section Ambient to +85 C Case 3. 3. Symbol Parameter f_lock Frequency Lock at Powerup [1,2] b_sync Bit Sync Time t RX [0:3][0:9] ...
Page 6
RC [0:3] [1] RX [0:3] [0:9] K28.5 Figure 5b. Receiver section timing (single receive clock [0:3] ± RX [0:3] [0:9] RC [0:3] [1] Figure 6. Receiver latency. Absolute Maximum Ratings ...
Page 7
Transceiver Reference Clock Requirements Ambient to +85 C Case Symbol Parameter f Nominal Frequency (for Gigabit Ethernet Compliance) f Nominal Frequency (for Fibre Channel Compliance) F Frequency Tolerance tol Symm Symmetry (Duty Cycle) TTL ...
Page 8
Figure 7a. Eye diagram of a high speed differential output for Gigabit Ethernet. Figure 7b. Eye diagram of a high speed differential output for Fibre Channel. Output Jitter Characteristics – Transmitter Section Ambient to +85 C ...
Page 9
... J is the power being dissipated 70841B A 70311A PATTERN GENERATOR +K28.5, –K28.5 + DATA – DATA 1.25 GHz A 83480A OSCILLOSCOPE DIVIDE TRIGGER BY 2 CH1 CH2 +SOi –SOi –SIi +SIi HDMP-1687 SYNC 125 MHz RFCT LOOP TXi(0..9) RXi(0..9) Units Typ. Max. W 2.6 3.3 C/W 15.8 C/W 2.5 C/W 1 where T ...
Page 10
O_TTL V CC ESD PROTECTION GND Figure 9. O-TTL and I-TTL simplified circuit schematic. HS_OUT Zo Zo ESD PROTECTION NOTES: 1. HS_IN INPUTS SHOULD NEVER BE CONNECTED TO GROUND AS PERMANENT DAMAGE TO THE DEVICE MAY RESULT. 2. CAPACITORS MAY ...
Page 11
... N GND V V VCP0 GND RCM0 * GND GND SIO– SIO+ V SI1– Previously RFC1 changed to RFCT for data sheet consistency. Figure 11. Pinout of HDMP-1687 (top view). Filtering Schematic 0 GND V GND CC B GND C VCR VCR D VCR GND GND ...
Page 12
... CC 0.1 µ 0.1 µF 10 µ µF 0.1 µF 0.1 µF HDMP-1687 GUIDELINES FOR DECOUPLING CAPACITOR PLACEMENTS/CONNECTIONS 0.1 µF 0.1 µF PLACEMENT NOT CRITICAL µH INDICATES THE NEED FOR ADDITIONAL + LOW FREQUENCY CAPACITIVE DECOUPLING. 0.1 µF 10 µF + OPTIONAL – PROVIDES INCREASED + LOW FREQUENCY DECOUPLING. 0.1 µF ...
Page 13
TRx I/O Definition Name Type Signal SI [0:3]+ HS_IN Serial Data Inputs: High-speed inputs. Serial data is accepted from the SI [0:3] SI [0:3]– inputs when LOOP is low. SO [0:3]+ HS_ OUT Serial Data Outputs: High speed outputs. These ...
Page 14
... GND balls. 208 Ball TBGA Package Drawing A1 CORNER HDMP-1687 ABCD–N RE.FG S YYWW HONG KONG Procedure to follow for soldering the HDMP-1687, 208-ball TBGA package Convective Reflow per IPC/JEDEC J-STD-020A standard for BGA IR Reflow. 14 TOP VIEW ...
Page 15
Package Drawing Nx0b eee CORNER [–Y–] E TOLERANCE OF FORM AND POSITION SYMBOL ddd eee 15 O (4x (CAVITY DOWN) (BACKFILL) ...
Page 16
... Data subject to change. Copyright © 2001 Agilent Technologies, Inc. September 21, 2001 Obsoletes 5988-1305EN 5988-4080EN ...