TLE6210G Infineon Technologies AG, TLE6210G Datasheet

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TLE6210G

Manufacturer Part Number
TLE6210G
Description
TLE6210GABS System IC
Manufacturer
Infineon Technologies AG
Datasheet

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Part Number:
TLE6210G
Manufacturer:
INF
Quantity:
5 510
Part Number:
TLE6210G-C1
Manufacturer:
INFINEO
Quantity:
5 995
ABS System IC
1
1.1
• 5 V, 800 mA linear regulator
• Undervoltage/overvoltage reset
• Undervoltage and overvoltage logout
• Digital watchdog supervision for 2 Microcontrollers
• (motor) relay driver
• (valve) relay driver
• Inverted or non inverted lamp relay driver
• Enable output
• Overtemperature and overcurrent protection
Type
TLE 6210 C
TLE 6210 G
TLE 6211 G
1.2
The TLE 6210 and TLE 6211 are integrated circuit consisting of a 5 V voltage regulator
with 800 mA current capability, different relay driver outputs and supervision logic. The
supervision logic watches the input voltage and the regulator output voltage both for
over-voltage and under-voltage. In addition two window watchdogs supervise the correct
operation of 2 independent watchdog signals, e.g. from two Microcontrollers.
The TLE 6210 and TLE 6211 are designed especially for the severe conditions of ABS/
ASR applications in an automotive environment.
V1.2 Data Sheet
Overview
Features
Functional Description
Ordering code
on request
on request
on request
1
Package/Shipment
Bare dice
P-DSO-20-12, Tape and
Reel
P-DSO-20-12, Tape and
Reel
P-DSO-20-10, -12, -16
TLE 6210
TLE 6211
2002-08

Related parts for TLE6210G

TLE6210G Summary of contents

Page 1

ABS System IC 1 Overview 1.1 Features • 800 mA linear regulator • Undervoltage/overvoltage reset • Undervoltage and overvoltage logout • Digital watchdog supervision for 2 Microcontrollers • (motor) relay driver • (valve) relay driver • Inverted or ...

Page 2

Block Diagram UZP MR PGND VR PGND SILA PGND NSILA PGND Oscillator PGND Figure 1 Block Diagram V1.2 Data Sheet Linear Regulator USTS under- and UZP UVLO overvoltage and OVLO reset detection detection Reset detection SupervisionLogic Window watchdog Clock ...

Page 3

Pin / Pad Configuration Figure 2 Pin Configuration P-DSO-20-12 VR SILA NSILA GNDP GNDP GND MR Figure 3 Chip-Layout V1.2 Data Sheet Layout 3 TLE 6210 TLE 6211 Pin / Pad Configuration 2002-08 ...

Page 4

Pin / Pad Definitions and Functions Pin Number TLE 6210 G TLE 6211G – – ...

Page 5

Electrical Characteristics 3.1 Absolute Maximum Ratings -40 ° C £ £ 150 ° Parameter M1 Supply Voltage M2 Supply Voltage variation M3 Output voltage at VR Output voltage at SILA M5 Output voltage ...

Page 6

Absolute Maximum Ratings (cont’d) -40 ° C £ £ 150 ° Parameter M12 ESD M13 Life Time Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum ...

Page 7

Functional Range # Parameter F1 Supply voltage F2 Input capacitor F3 Case Temperature F4 Junction Temperature F5 Thermal resistance junction-ambient F6 Thermal resistance junction-case 1) Parameter may deviate in the temperature range Total operation time max for ...

Page 8

Block Description and Electrical Characteristics 4.1 General Characteristics 6 V £ £ -40 ° C £ Parameter 4.1.1 Power consumption regulator 4.1.2 Overtemperature protection threshold 4.2 Oscillator A 16 kHz oscillator is used as ...

Page 9

Charge Pump The integrated charge pump requires an external capacitor at pin voltage is typically internally used for the voltage regulator only only intended for internal function and may not be used for ...

Page 10

Voltage Regulator The 5 V low drop linear regulator can supply up to 800 mA current. The regulator requires an output capacitor. The linear regulator is equipped with overcurrent protection and its own overtemperature protection. The linear element consists ...

Page 11

Characteristics Voltage Regulator (cont’ £ £ -40 ° C £ Parameter Sym- bol D 4.4.4 Load variation D 4.4.5 Temperature variation D 4.4.6 Long time drift U 4.4.7 Overall output voltage tolerance D ...

Page 12

Enable-Output EN The open collector enable output EN informs the system about any error condition. Any error except a detected supply under-voltage will set the EN output Low. Of cause for long under-voltage at the supply line, soon the ...

Page 13

Power Driver The TLE 6210/TLE 6211 includes 3 open drain outputs for loads up to 0.5 A: The two drivers VR and MR are intended for (valve and motor) relays, while the SILA/NSILA output is designed for a lamp. In ...

Page 14

Motor Relay Driver The motor relay driver MR is controlled by the MRA input signal and the internal control logic. A logic High at the MRA input switches the MR low side switch on, a logic Low signal switches ...

Page 15

Control Input MRA The logic inputs MRA expect TTL-type signals from a m -controller with 5 V I/Os. An integrated pull-up resistor ensures that an open input is read High. Characteristics Control Inputs MRA 6 V £ £ 18 ...

Page 16

Error Lamp Output SILA and Lamp Relay Output NSILA The SILA output is a 300 mA open collector output available in the TLE 6210 G. SILA is a self-on output switched on if the supply ...

Page 17

Characteristics Lamp-Relay Driver Output NSILA 6 V £ £ -40 ° C £ Parameter 4.8.6 On state resistance 4.8.7 Overload detection current 4.8.8 Output leakage current 4.8.1 Control Input SIA The logic inputs SIA expect ...

Page 18

Supervision The TLE 6210 and TLE 6211 are equipped with a complex supervision logic. The input voltage and the regulator output voltage is supervised. In addition two m -controller are supervised by independent watchdog circuits. 4.9 Overvoltage and Undervoltage Both ...

Page 19

When the undervoltage condition at time of typical 52 ms (52 clock cycles) is started. After this time the reset signal is set high. Table 1 Truth Table Overvoltage and Undervoltage Supervision The table assumes that no other error is ...

Page 20

Under- and Overvoltage Reset Behavior UZP 12V 5.3V UST 5V 4.6V 52ms RES1 5V RES2 5V Figure 4 Characteristics Supervision £ £ -40 ° C £ Parameter U -Undervoltage ZP U ...

Page 21

Characteristics Supervision £ £ -40 ° C £ Parameter U 4.9.4 overvoltage ZP hysteresis 4.9.5 U overvoltage ZP filter U -Undervoltage ST 4.9.6 undervoltage U ST threshold 4.9.7 undervoltage U ST hysteresis ...

Page 22

Reset Outputs RES1, RES2 The two reset outputs RES1 and RES2 are open collector outputs with integrated pull- up resistor of typical Characteristics RES1 and RES2 6 V £ £ ...

Page 23

Watchdog To supervise the operation -processors watchdog logic for two input signals is integrated. The logic expects at each WD1 and WD2 rectangular signals with 10 ms high and 10 ms low time. Deviations from the ...

Page 24

The logic expects the time between two clock edges between 3 and 15 clock-cycles. If this window is not met, the outputs VR, MR and NSILA are switched off, SILA is switched on and the enable output goes low. An ...

Page 25

WD1 0 1 WD2 Figure 8 Missing watchdog signals cause EN low 1 WD1 0 1 WD2 Counter Reset 0 Figure 9 Timing diagram - any watchdog signal missing ...

Page 26

Any watchdog high or low time above 15 ms influences the enable (EN) and the VR output.If the time after the last watchdog edge exceeds 120 clock cycles - typical 120 ms- an error flag is set. This flag can ...

Page 27

Characteristics WD1, WD2 6 V £ £ -40 ° C £ Parameter 4.11.1 Internal pullup resistor 4.11.2 Input voltage Low 4.11.3 Input voltage High 4.11.4 Input current Characteristics Watchdog 6 V £ ...

Page 28

Watchdog Logic Table 2 and Figure 11 show the watchdog logic. figure 12 shows the logic implementation Watchdog WD1, Clock WD2 Time between Edges ok ok < CLK > CLK > ...

Page 29

WD1 WD2 SILA NSILA Figure 11 Watchdog watchdog signals at WD1 or WD2 Normal operation going high after the first watchdog edges at WD1 and WD2 2 ...

Page 30

CLK BIT Q2 WD SHIFT Q3 REGISTER Q4 Q5 RESQ wd-detect AD06/02 Figure 12 Logic Diagram: Detection of Watchdog Edges. The watchog signal is clocked through the shiftregister. The output condition of the edge detection circuit above ...

Page 31

Application Diagram TLE6210/1 U Bat UZP U U Bat Bat MR PGND PGND Bat Bat SILA PGND NSILA PGND Figure 14 Application Diagram V1.2 Data Sheet Linear Regulator USTS under- and UZP UVLO overvoltage and OVLO ...

Page 32

Package Outlines P-DSO-20-12 (Plastic Dual Small Outline Package) 1.2 -0.3 1.27 +0.13 0.4 20 Index Marking 45˚ 1) Does not include plastic or metal protrusion of 0.15 max. per side Sorts of Packing Package outlines for ...

Page 33

Version Date Major Changes V0.0 2002-08 Advanced Information Data Sheet TLE 6210, TLE 6211 Device is a replacement of the TLE 5200/TLE 5201 with the following deviations form the specification from 1998-01-21. Devices are only available in the P-DSO-20-12 package ...

Page 34

Version Date Major Changes V1.0 2002-07 Data sheet Remove pad / chip information from the datasheet ESD value SILA, MR, VR,UZP 4kV Update typ. value 4.3.3 Extend and correct block description at chapters 4.4; 4.6; 4.7; 4.8 Table 1: SILA ...

Page 35

... Edition 2002-08 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2002. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein ...

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