MT4LC16M4T8TG-5 Micron Semiconductor Products, MT4LC16M4T8TG-5 Datasheet

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MT4LC16M4T8TG-5

Manufacturer Part Number
MT4LC16M4T8TG-5
Description
Manufacturer
Micron Semiconductor Products
Datasheet
DRAM
FEATURES
• Single +3.3V ±0.3V power supply
• Industry-standard x4 pinout, timing, functions,
• 13 row, 11 column addresses (A7)
• High-performance CMOS silicon-gate process
• All inputs, outputs and clocks are LVTTL-compat-
• FAST-PAGE-MODE (FPM) access
• 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH
• Optional self refresh (S) for low-power data
OPTIONS
• Refresh Addressing
• Plastic Packages
• Timing
• Refresh Rates
NOTE: 1. The 16 Meg x 4 FPM DRAM base number
*Contact factory for availability
KEY TIMING PARAMETERS
16 Meg x 4 FPM DRAM
D21_2.p65 – Rev. 5/00
SPEED
and packages
12 row, 12 column addresses (T8)
ible
distributed across 64ms
retention
4,096 (4K) rows
8,192 (8K) rows
32-pin SOJ (400 mil)
32-pin TSOP (400 mil)
50ns access
60ns access
Standard Refresh
Self Refresh (128ms period)
-5
-6
2. The # symbol indicates signal is active LOW.
differentiates the offerings in one place—
MT4LC16M4A7. The fifth field distinguishes
various options: A7 designates an 8K refresh and
T8 designates a 4K refresh for FPM DRAMs.
110ns
90ns
t
RC
MT4LC16M4A7DJ
Part Number Example:
t
50ns
60ns
RAC
30ns
35ns
t
PC
25ns
30ns
t
MARKING
AA
None
TG
A7
T8
DJ
-5
-6
S*
t
13ns
15ns
CAC
1
MT4LC16M4A7, MT4LC16M4T8
For the latest data sheet, please refer to the Micron Web
site:
16 MEG x 4 FPM DRAM PART NUMBERS
x = speed
GENERAL DESCRIPTION
dynamic random-access memory devices contain-ing
67,108,864 bits organized in a x4 configuration. The
MT4LC16M4A7 and MT4LC16M4T8 are functionally
organized as 16,777,216 locations containing four bits
each. The 16,777,216 memory locations are arranged in
8,192 rows by 2,048 columns for the MT4LC16M4A7 or
4,096 rows by 4,096 columns for the MT4LC16M4T8.
During READ or WRITE cycles, each location is uniquely
RAS#
PART NUMBER
MT4LC16M4A7DJ-x
MT4LC16M4A7DJ-x S
MT4LC16M4A7TG-x
MT4LC16M4A7TG-x S
MT4LC16M4T8DJ-x
MT4LC16M4T8DJ-x S
MT4LC16M4T8TG-x
MT4LC16M4T8TG-x S
WE#
DQ0
DQ1
**A12 on A7 version and NC on T8 version
V
V
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
CC
CC
The 16 Meg x 4 DRAMs are high-speed CMOS,
www.micronsemi.com/mti/msp/html/datasheet.html
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-Pin SOJ
PIN ASSIGNMENT (Top View)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DQ3
DQ2
NC
NC
NC
CAS#
OE#
A12/NC**
A11
A10
A9
A8
A7
A6
V
ADDRESSING PACKAGE REFRESH
SS
SS
REFRESH
8K
8K
8K
4K
4K
4K
8K
4K
RAS#
WE#
DQ0
DQ1
V
V
NC
NC
NC
NC
A0
A1
A2
A3
A4
A5
CC
CC
32-Pin TSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16 MEG x 4
FPM DRAM
TSOP
TSOP
TSOP
TSOP
SOJ
SOJ
SOJ
SOJ
©2000, Micron Technology, Inc.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Standard
Standard
Standard
Standard
V
DQ3
DQ2
NC
NC
NC
CAS#
OE#
A12/NC**
A11
A10
A9
A8
A7
A6
V
Self
Self
Self
Self
SS
SS

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MT4LC16M4T8TG-5 Summary of contents

Page 1

... MT4LC16M4A7TG-x None MT4LC16M4A7TG MT4LC16M4T8DJ-x MT4LC16M4T8DJ-x S MT4LC16M4T8TG-x MT4LC16M4T8TG speed GENERAL DESCRIPTION The 16 Meg x 4 DRAMs are high-speed CMOS, dynamic random-access memory devices contain-ing 67,108,864 bits organized configuration. The MT4LC16M4A7 and MT4LC16M4T8 are functionally organized as 16,777,216 locations containing four bits each ...

Page 2

WE# CAS# NO. 2 CLOCK GENERATOR COLUMN- ADDRESS A0 11 BUFFER(11 REFRESH CONTROLLER REFRESH A7 COUNTER A10 ROW- A11 ADDRESS 13 A12 BUFFERS (13) NO. 1 CLOCK RAS# GENERATOR WE# CAS# ...

Page 3

GENERAL DESCRIPTION (continued) addressed via the address bits. First, the row address is latched by the RAS# signal, then the column address by CAS#. Both devices provide FAST-PAGE-MODE opera- tion, allowing for fast successive data operations (READ, WRITE, or READ-MODIFY-WRITE) ...

Page 4

ABSOLUTE MAXIMUM RATINGS* Voltage on V Relative to V ................ -1V to +4. Voltage on NC, Inputs or I/O Pins Relative to V ..................................... -1V to +4.6V SS Operating Temperature, T (ambient) ... 0°C to +70°C A Storage ...

Page 5

I OPERATING CONDITIONS AND MAXIMUM LIMITS CC (Notes +3.3V ±0.3V) CC PARAMETER/CONDITION STANDBY CURRENT: TTL (RAS# = CAS STANDBY CURRENT: CMOS (RAS# = CAS 0.2V, DQs may ...

Page 6

CAPACITANCE (Note: 2) PARAMETER Input Capacitance: Address pins Input Capacitance: RAS#, CAS#, WE#, OE# Input/Output Capacitance ELECTRICAL CHARACTERISTICS (Notes 10, 11, 12 CHARACTERISTICS PARAMETER Access time from column address Column-address hold ...

Page 7

AC ELECTRICAL CHARACTERISTICS (Notes 10, 11, 12 CHARACTERISTICS PARAMETER Row-address hold time RAS# pulse width RAS# pulse width (FAST PAGE MODE) RAS# pulse width during Self Refresh Random READ or WRITE cycle time ...

Page 8

NOTES 1. All voltages referenced This parameter is sampled. V MHz dependent on output loading and cycle CC rates. Specified values are obtained with mini- mum cycle time and the outputs open. 4. ...

Page 9

V IH RAS CRP V IH CAS ASR V IH ROW ADDR WE IOH DQ V IOL TIMING PARAMETERS -5 SYMBOL MIN MAX ...

Page 10

V IH RAS CRP V IH CAS ASR V IH ADDR ROW WE IOH DQ V IOL TIMING PARAMETERS -5 SYMBOL MIN MAX ...

Page 11

WRITE and READ-MODIFY-WRITE cycles RAS CRP V IH CAS ASR V IH ADDR V ROW WE IOH DQ V IOL ...

Page 12

V IH RAS CSH t CRP V IH CAS RAD t ASR t RAH V IH ADDR V ROW WE IOH DQ OPEN V IOL V IH OE# ...

Page 13

FAST-PAGE-MODE EARLY WRITE CYCLE V IH RAS CSH t CRP V IH CAS RAD t ASR t RAH V IH ADDR ROW WCS ...

Page 14

FAST-PAGE-MODE READ-WRITE CYCLE (LATE WRITE and READ-MODIFY-WRITE cycles RAS CRP V IH CAS RAD t ASR t RAH V IH ADDR ROW WE ...

Page 15

FAST-PAGE-MODE READ EARLY WRITE CYCLE V IH RAS CRP V IH CAS ASR t RAH V IH ADDR V ROW WE TIMING PARAMETERS -5 ...

Page 16

V IH RAS CRP V IH CAS ASR V IH ADDR RAS RPC CAS ...

Page 17

V IH RAS CRP V IH CAS ASR t RAH V IH ADDR ROW IOH DQ V IOL TIMING PARAMETERS -5 SYMBOL MIN MAX t AA ...

Page 18

RAS RPC CSR V IH CAS WRP TIMING PARAMETERS -5 SYMBOL MIN MAX t CHD 15 t ...

Page 19

PIN #1 INDEX .037 [0.95] MAX DAMBAR PROTRUSION .024 [0.61] .020 (0.51) .015 (0.38) NOTE: 1. All dimensions in inches (millimeters) MAX or typical where noted. 2. Package ...

Page 20

TYP PIN 1 ID +0.07 0.43 -0.13 NOTE: 1. All dimensions in millimeters MAX or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold protrusion is .25mm per side. 8000 S. ...

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