21285-AB

Manufacturer Part Number21285-AB
DescriptionMicroprocessor, 21285 Core Logic For SA-110 Microprocessor
ManufacturerIntel Corporation
21285-AB datasheet
 


Specifications of 21285-AB

CaseBGADc99+/00+
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Page 149/159:

AC Timing Specifications

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9.4

AC Timing Specifications

The next sections describe the following specifications:
PCI clock timing
PCI signal timing
PCI reset timing
JTAG timing
9.4.1
PCI Clock Timing Specifications
The ac specifications consist of input requirements and output responses. The input requirements
consist of setup and hold times, pulse widths, and high and low times. The output responses are
delays from clock to signal. The ac specifications are defined separately for each clock domain
(pci_clk and fclk_in) within the 21285.
Figure 9-1
shows the ac parameter measurements for the pci_clk signal, and
pci_clk parameter values for clock signal ac timing. See also
signal timing.
Figure 9-1. PCI Clock Signal AC Parameter Measurement Conditions
V
V
t2
V t3
pci_clk
T
r
Note:
_ 2.0 V for 5-V clocks; 0.5 V
V
t1
_ 1.5 V for 5-V clocks; 0.4 V
V
t2
_ 0.8 V for 5-V clocks; 0.3 V
V
t3
Table 9-4. PCI Clock Signal AC Parameters
Symbol
Parameter
T
pci_clk cycle time
cyc
T
pci_clk high time
high
T
pci_clk low time
low
pci_clk slew rate
a.
0.2 V
to 0.6 V
cc
cc
21285 Core Logic for SA-110 Datasheet
t1
T
high
T
f
for 3.3-V clocks
cc
for 3.3-V clocks
cc
for 3.3-V clocks
cc
Minimum
30
11
11
a
1
Electrical Specifications
Table 9-4
specifies
Figure 9-2
for a further illustration of
T
low
FM-05688.AI4
Maximum
Unit
ns
ns
ns
4
V/ns
9-3