21285-AB

Manufacturer Part Number21285-AB
DescriptionMicroprocessor, 21285 Core Logic For SA-110 Microprocessor
ManufacturerIntel Corporation
21285-AB datasheet
 


Specifications of 21285-AB

CaseBGADc99+/00+
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ROM Control

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4.2

ROM Control

Figure 4-2
shows the ROM configuration. The ROM output enable and write enable are connected
to address bits [30:31] respectively. The ROM address is connected to address bits [24:2].
Figure 4-2. ROM Configuration
SA-110
This section describes the following aspects of the 21285 ROM interface:
Addressing
Reads
Writes
Timing
Blank ROM programming
4.2.1
Addressing
The ROM can always be addressed by the SA-110 at 41000000h through 41FFFFFFh as listed in
Table
5-1. After reset, the ROM is also aliased at every 16 megabytes throughout memory space,
blocking access to SDRAM. This allows the SA-110 to boot from ROM at address 0. After any
SA-110 write, the alias address range is disabled.
The ROM address pins should be connected to the SA-110 address (A) pins depending on the
ROM width as described in
21285 Core Logic for SA-110 Datasheet
A[30]
OE_L
A[31]
WE_L
A[24:2]
A
A (Address)
D (Data)
Table
4-4.
SDRAM and ROM Operation
ROM
D
CE_L
rom_ce_l
21285
FM-05939.AI4
4-5