MSM514221B-30RS Oki Semiconductor, MSM514221B-30RS Datasheet

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MSM514221B-30RS

Manufacturer Part Number
MSM514221B-30RS
Description
262,263-word x 4-bit field memory
Manufacturer
Oki Semiconductor
Datasheet
E2L0029-17-Y1
查询MSM514221B供应商
This version: Jan. 1998
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¡ Semiconductor
MSM514221B
Previous version: Dec. 1996
MSM514221B
262,263-Word ¥ 4-Bit Field Memory
DESCRIRTION
The OKI MSM514221B is a high performance 1-Mbit, 256K ¥ 4-bit, Field Memory. It is designed
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital
movies and Multi-media systems. It is a FRAM for wide or low end use as general commodity
TVs and VTRs, exclusively. The MSM514221B is not designed for the other use or high end use
in medical systems, professional graphics systems which require long term picture, and data
storage systems and others. The 1-Mbit capacity fits one field of a conventional NTSC TV screen.
Each of the 4-bit planes has separate serial write and read ports. These employ independent
control clocks to support asynchronous read and write operations. Different clock rates are also
supported that allow alternate data rates between write and read data streams.
The MSM514221B provides high speed FIFO, First-In First-Out, operation without external
refreshing: it refreshes its DRAM storage cells automatically, so that it appears fully static to the
users.
Moreover, fully static type memory cells and decoders for serial access enable refresh free serial
access operation, so that the serial read and/or write control clock can be halted high or low for
any duration as long as the power is on. Internal conflicts of memory access and refreshing
operations are prevented by special arbitration logic.
The MSM514221B's function is simple, and similar to a digital delay device whose delay-bit-
length is easily set by reset timing. The delay length, number of read delay clocks between write
and read, is determined by externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256 ¥ 4-bit enable high
speed first-bit-access with no clock delay just after the write or read reset timings.
The MSM514221B is similar in operation and functionality to OKI 2-Mbit Field Memory
MSM518221.
1/15

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MSM514221B-30RS Summary of contents

Page 1

... HDTVs, conventional NTSC TVs, VTRs, digital movies and Multi-media systems FRAM for wide or low end use as general commodity TVs and VTRs, exclusively. The MSM514221B is not designed for the other use or high end use in medical systems, professional graphics systems which require long term picture, and data storage systems and others ...

Page 2

... Self refresh (No refresh control is required) • Package options: 16-pin 300 mil plastic DIP 26/20-pin 300 mil plastic SOJ (SOJ26/20-P-300-1.27) 20-pin 400 mil plastic ZIP PRODUCT FAMILY Family Access Time (Max.) MSM514221B-30RS MSM514221B-40RS MSM514221B-60RS MSM514221B-30JS MSM514221B-40JS MSM514221B-60JS MSM514221B-30ZS MSM514221B-40ZS MSM514221B-60ZS ...

Page 3

... Serial Read Clock WE Write Enable RE Read Enable Write Reset Clock RSTR Read Reset Clock Data Input Data Output V Power Supply ( Ground ( Connection MSM514221B 26 V SRCK RSTR SRCK SWCK 7 ...

Page 4

... Controller Read Line Buffer Low-Half (¥ 4) High-Half (¥ 4) 256 (¥ 4) 256 (¥ 4) 256K (¥ 4) Memory Decoder Array 256 (¥ 4) 256 (¥ 4) Write Line Buffer Low-Half (¥ 4) High-Half (¥ 4) Write Controller WE RSTW SWCK MSM514221B Read/Write X and Refresh Controller Clock Oscillator V BB Generator 4/15 ...

Page 5

... There are no WE disable time (low) and WE enable time (high) restrictions, because the MSM514221B is in fully static operation as long as the power is on. Note that WE setup and hold times are referenced to the rising edge of SWCK ...

Page 6

... The function gate of the SRCK clock for incrementing the read pointer. When RE is high before the rising edge of SRCK, the read pointer is incremented. When RE is low, the read pointer is not incremented. RE setup times ( are referenced to the rising edge of the SRCK clock. RDSH and t ) and RE hold times (t RENS RDSS MSM514221B and RENH 6/15 ...

Page 7

... RSTR operations is more than 120 but less than 600 cycles, then the data read out will be undetermined. It may be “old data” or “new” data combination of old and new data. Such a timing should be avoided. MSM514221B and/or the substrate voltage has not CC ...

Page 8

... Other Pins Tested < V < – 4 -30 Minimum Cycle Time, Output Open -40 -60 Input Pin = MSM514221B Rating Unit –1 °C –55 to 150 °C Max. Unit 5 ...

Page 9

... T MSM514221B ( ±10 0°C to 70°C) CC MSM514221B-60 Unit Max. Min. Max. 30 — — 6 — — 9 — ns — 17 — ns — 17 — ns — ...

Page 10

... However, normal write is achieved in this address condition. 6. Outputs are measured with a load equivalent to 2 TTL loads and 30 pF. Output reference levels are V is defined transition time that signal transfers 2.4 V and MSM514221B = 2.4 V and 10/15 ...

Page 11

... IN RSTW 0 Cycle 1 Cycle t t WSWH WSWL t RSTWH t SWC 0 1 Disable Cycle Disable Cycle t t WDSH WDSS t WWEH WWEL MSM514221B 2 Cycle Cycle t WENS – – – – – – – – – ...

Page 12

... WSRH WSRL t RSTRH t SRC t DDCK n 0 Disable Cycle Disable Cycle t t RDSH RDSS t WREH t WREL t DDRE n Hi-Z MSM514221B 2 Cycle Cycle t RENS t DECK – – – – – – – – – ...

Page 13

... Semiconductor PACKAGE DIMENSIONS DIP16-P-300-2.54-W1 MSM514221B (Unit : mm) Package material Epoxy resin Lead frame material 42 alloy Pin treatment Solder plating more Solder plate thickness 1.00 TYP. Package weight (g) 13/15 ...

Page 14

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM514221B (Unit : mm) Package material Epoxy resin ...

Page 15

... Semiconductor ZIP20-P-400-1.27 Mirror finish MSM514221B (Unit : mm) Package material Epoxy resin Lead frame material 42 alloy Pin treatment Solder plating more Solder plate thickness Package weight (g) 1.50 TYP. 15/15 ...

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