MSM82C84A-2RS Oki Semiconductor, MSM82C84A-2RS Datasheet
MSM82C84A-2RS
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MSM82C84A-2RS Summary of contents
Page 1
... MSM82C84A-2RS/GS/JS CLOCK GENERATOR AND DRIVER GENERAL DESCRIPTION The MSM82C84A-2RS/ clock generator designed to generate MSM80C86A-10 and MSM80C88A-10 system clocks of 8MHz. Due to the use of silicon gate CMOS technology, standby current is only 40 mA (MAX.), and the power consumption is very low with 16 mA (MAX.) when a 8 MHz clock is generated. ...
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... READY RDY2 17 9 AEN CLK 12 13 GND RDY 4 1 READY 5 RDY 6 2 AEN MSM82C84A-2RS/GS/ ASYNC 15 EFI 14 13 F/C OSC 12 RES 11 RESET ASYNC EFI NC F/C OSC NC RES RESET ...
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... IHR -V ILR 0 £ V £ £ V £ V LIA Note 1 CCS MHz MHz IN or open CC MSM82C84A-2RS/GS/JS Rating Unit MSM82C84A-2GS °C 0.7 W Unit V °C Max. Unit 5.5 V +85 ° ± 10 –40 to 85°C) CC Min ...
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... YHYL ELEL t 65 — ns I1HCL t 20 — ns CLI1H ns — ILIH t — IHIL MSM82C84A-2RS/GS/ ± 10 –40 to 85°C) CC Conditions 90% to 90% 10% to 10% — — ASYNC = High ASYNC = Low — Output Load — Capacitance — CLK output C = 100 pF L Others 30 pF — ...
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... CLK Output CLIL C = 100 pF L Others 30 pF — t CLPH — t CLPL — t OLCH — t OLCL 0 2 OLOH 2 0 OHOL MSM82C84A-2RS/GS/ ± 10 -40 to 85°C) CC Min. Max. Unit — ns 125 1 — CLCL 3 2 — –15 CLCL 3 ns — ...
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... Connecting Pins Crystal OSC Resonator Output Output MSM82C84A-2RS/GS/JS Function Synchronizing signal for output of in-phase CLK signals when more than one MSM82C84A-2 is used. The internal counter is reset when this signal is at high level, and a high level CLK output is generated. The internal counter is subsequently activated and a 33% duty CLK output is generated when this signal is switched to low level ...
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... And when at high level, the READY signal is generated by single synchronization. This pin is equipped with internal pull-up resistor power supply — GND — t ELEL t OLCH t YHEH t CLCL t OLCL t CLCH t PHPL t CLPH MSM82C84A-2RS/GS/JS t EHEL t ELEH t CH1CH2 t CHCL t CLPL t CL2CL1 t PLPH t I1HCL t CLI1H t CLIL 7/18 ...
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... READY Waveform (ASYNC = L) CLK RDY - 1 2 AEN - 1 2 ASYNC READY READY Waveform (ASYNC = H) CLK RDY - 1 2 AEN - 1 2 ASYNC READY t R1VCH t CLR1X t A1R1V t AYVCL t RYHCH t R1VCL t CLR1X t A1R1V t AYVCL t RYHCH MSM82C84A-2RS/GS/JS t R1VCL t CLR1X t CLA1X t CLAYX t RYLCL t R1VCL t CLR1X t CLA1X t CLAYX t RYLCL 8/18 ...
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... CPU in this case necessary to keep the RES input at low level for at least 50 ms after Vcc reaches the 4.5V level. Crystal Oscillator X OSC MSM 82C84A When input frequency MHz When input frequency MHz MSM82C84A-2RS/GS/JS 9/18 ...
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... The RDY input is output as the READY signal by single synchronization. Both low-level and high-level RDY inputs are synchronized by the falling edge of the CLK of the next stage flip-flop, resulting output of respective low-level and high-level READY output signals (see diagram below). CLK RDY READY MSM82C84A-2RS/GS/JS 10/18 ...
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... When the crystal oscillator is used as the clock source NOTES ON USE The MSM82C84A-2 cannot be used if the MSM80C86A-10 or MSM80C88A-10 is used within the range of 8 MHz < operating frequency £ 10 MHz CK≠ CKØ CK≠ CKØ MSM82C84A-2RS/GS/JS CSYNC MSM 82C84A-2 CLK EFI CLK X 1 CSYNC X 2 MSM 82C84A-2 OSC ...
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... High-speed device (New) M80C85AH M80C86A-10 M80C88A-10 M82C84A-2 M81C55-5 M82C37B-5 M82C51A-2 M82C53-2 M82C55A-2 Remarks Low-speed device (Old) M80C85A/M80C85A-2 8bit MPU 16bit MPU M80C86A/M80C86A-2 8bit MPU M80C88A/M80C88A-2 Clock generator M82C84A/M82C84A-5 RAM.I/O, timer M81C55 DMA controller M82C37A/M82C37A-5 USART M82C51A Timer M82C53-5 PPI M82C55A-5 MSM82C84A-2RS/GS/JS 12/18 ...
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... IHR- 0.25 V minimum V ILR - + LIA - + 100 mA maximum I CCS MSM82C84A-2RS/GS/JS MSM82C84A-5/-2 Input pin with built-in pull up resistor The value of pulldown resistor (when used) is limited. (See page 3.) MSM82C84A-5/-2 0.40 V maximum (+4 mA) 0.40 V maximum (+2.5 mA) V -0.1 V minimum (-4 mA 0.1 V minimum (-1 mA) CC- 0.2 ¥ ...
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... RYHCH Symbol MSM82C84A minimum EHEL minimum ELEH minimum ELEL — 15 MHz maximum t 200 ns minimum CHCL MSM82C84A-2RS/GS/JS MSM82C84A maximum 15 ns maximum 1 minimum CLCL 2/3 t -15 ns minimum CLCL 10 ns maximum t -20 ns minimum CLCL t -20 ns minimum CLCL 2/3 t -15 ns minimum ...
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... When the pulldown resistor is greater than 8 kiloohms, use a pulldown resistor of 8 kiloohms or less. Case 3: When an output of the other IC device is connected to the device. The MSM82C84A can be replaced by the MSM82C84A-2 when the I ASYNC pin of the MSM82C84A-2 has an allowance of 100 mA or more. MSM82C84A-2RS/GS/JS pin of the device to drive the OL 15/18 ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM82C84A-2RS/GS/JS (Unit : mm) Package material Epoxy resin ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM82C84A-2RS/GS/JS (Unit : mm) Package material Epoxy resin ...
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... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). MSM82C84A-2RS/GS/JS (Unit : mm) Package material Epoxy resin ...