MSM6636 Oki Semiconductor, MSM6636 Datasheet

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MSM6636

Manufacturer Part Number
MSM6636
Description
SAE-J1850 communication protocol conformity transmission controller for automotive LAN
Manufacturer
Oki Semiconductor
Datasheet

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MSM6636
SAE-J1850 Communication Protocol Conformity Transmission Controller for Automo-
tive LAN
GENERAL DESCRIPTION
The MSM6636 is a transmission controller for automotive LAN based on data communication
protocol SAE-J1850. This LSI can realize a data bus topology bus LAN system with a PWM bit
encoding method (41.6 K bps). In addition to a protocol control circuit, MSM6636 has an enclosed
quartz oscillation circuit, host CPU interface (clock synchronous serial / UART), a transmit/
receive buffer, and a bus receiver circuit that decreases the burden on the host CPU.
FEATURES
• Based on SAE-J1850 CLASS B DATA COMMUNICATION NETWORK INTERFACE (issued
• CSMA/CD (Carrier-sense multiple access with collision detection)
• Internal transmit buffer (1 frame) and receive buffer (2 frames)
• Bit encoding: PWM (Pulse Width Modulation)
• Transmission Speed: 41.6K bps
• Multi-address setting with physical addressing: 1 type / functional addressing: 15 types
• Address filter function by multi-addressing (broadcasting possible)
• Automatic retransmission function by arbitration loss and non ACK
• 3 types of in-frame response support:
• Error detection by cyclic redundancy check (CRC)
• Various communication error detections
• Dual-wire bus abnormality detection by internal bus receiver and fault tolerance function
• Host CPU interface is LSB first / serial, 4 modes supported
• Sleep Function
• Available package 18pin DIP, 18 pin QFJ (PLCC) and 24pin SOP.
August 12, 1991)
q Single-byte response from a single recipient
w Multi-byte response from a single recipient (with CRC code)
e Single-byte response from multiple recipients (ID response as ACK)
q Clock synchronous serial (no parity)
w UART (yes/no parity selectable)
Low current consumption mode by oscillation stop (IDS Max < 50 A)
SLEEP / WAKE UP control from host CPU, WAKE UP via LAN bus
Normal mode: 8-bit data
MPC Mode:
Normal mode: 1 start bit + 8-bit data + (parity) + 1 stop bit
MPC mode:
8-bit data + MPC bit (1: address / 0: data select bit)
1 start bit + 8-bit data + MPC bit + (parity) + 1 stop bit
MSM6636
1

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MSM6636 Summary of contents

Page 1

... The MSM6636 is a transmission controller for automotive LAN based on data communication protocol SAE-J1850. This LSI can realize a data bus topology bus LAN system with a PWM bit encoding method (41.6 K bps). In addition to a protocol control circuit, MSM6636 has an enclosed quartz oscillation circuit, host CPU interface (clock synchronous serial / UART), a transmit/ receive buffer, and a bus receiver circuit that decreases the burden on the host CPU ...

Page 2

... Status Register Transmission Register Response Register x'tal Clock Generator 2 LAN Controller S-P PWM Receive Converter Decoder Buffer CRC Checker Receive Controller Transmission Controller CRC Generator P-S Converter MSM6636 ¡ Semiconductor LAN Bus Input Degital Bus Filter Receiver Address Filter LAN Bus Output PWM Encoder ...

Page 3

... Serial clock input/Parity select pin 20 I Serial data input pin 21 O Serial data output pin 22 O Interrupt output pin 23 I Reset input pin 24 — Digital power supply pin MSM6636 24pin Plastic SOP DVDD 1 24 RES 2 23 INT 3 22 TXD 4 21 RXD 5 ...

Page 4

... MSM6636 ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Input Voltage Output Voltage Power Dissipation Storage Temperature D(DIP 18PIN DIP package power dissipation D(QFJ 18PIN QFJ package power dissipation D(SOP 24PIN SOP package power dissipation Power Dissipation Curve < 18PIN DIP package > ...

Page 5

... OL1 -4.0mA E DVDD - 0.4 OH2 +4.0mA E OL2 O — — OFF I During sleep — 16MHz, I — load MSM6636 DGND = AGND = 0V Rated Value Unit 4.5~5.5 V 2~16 MHz -40~+125 °C MIN TYP MAX Unit — DVDD + 0.3 V DVDD ¥ 0.2 — V — DVDD + 1.0 V — DGND + 2.0 ...

Page 6

... MSM6636 AC Chacteristics PWM Bit Timing Parameter Symbol Bit Length TP1 "1" Dominant Width TP2 "0" Dominant Width TP3 "SOF" Dominant Width TP4 "SOF,BRK" Length TP5 "BRK" Dominant Width TP6 "EOD" + Bit Length TP7 "EOF" + Bit Length TP8 "EOF + IFS" + Bit Length TP9 " ...

Page 7

... CKHW t 4tø — — SRS t 4tø — — SRH t 4tø — 6tø + 100 STD t 0 — — 8tø — — 8tø — — INT1 t 16tø — — INT2 MSM6636 Unit ...

Page 8

... MSM6636 mUART Parameter A-D - STOP bit ≠ Setup Time STOP bit Ø – A-D Hold Time START bit Ø – TXD Output Delay Time Write Frame Interval Time *3 Read Frame Interval Time *4 *3 Write Frame Interval Time Between “Communication type (WR) and address setting” frame and “WR data” frame. ...

Page 9

... DVDD=AVDD=5V±10%, Ta =-40~+125°C Symbol Min Typ t 7 — 300 — — UAS UAH STOP START t INT3 t INT4 t UTD STOP bit Termination MSM6636 Max Unit — µs — ns — µs START 9 ...

Page 10

... MSM6636 Fault Tolerant Function Operation Conditions Parameter LAN bus (+) GND Short Circuit Detection Pulse Width t LAN bus (+) VDD Short Circuit Detection Pulse Width t LAN bus (-) GND Short Circuit Detection Pulse Width LAN bus (-) VDD Short Circuit Detection Pulse Width BUS(+) BUS(-) ...

Page 11

... Semiconductor APPLICATION EXAMPLE Host CPU and LAN bus Connection Example Host CPU and LAN bus connection example of MSM6636 is shown below. Host CPU SOUT SIN INT CLKOUT OPEN RES The above connection example is when "UART, MPC and parity no mode" was used as the " ...

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