TDA9103 SGS-Thomson-Microelectronics, TDA9103 Datasheet
TDA9103
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TDA9103 Summary of contents
Page 1
... The TDA9103 is a monolithic integrated circuit assembled pins shrunk dual in line plastic package. This IC controls all the functions related to the horizontal and vertical deflection in multimodes or multisync monitors. As can be seen in the block diagram, the TDA9103 includes the following functions : - Positive or Negative sync polarities, ...
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... TDA9103 PIN-OUT DESCRIPTION Pin N Name 1 PLL2C Second PLL Loop Filter DC Control of Horizontal Drive Output Pulse Duty-cycle. 2 H-DUTY If this pin is grounded, the horizontal and vertical outputs are inhibited. By connecting a capacitor on this pin a soft-start function may be realized on h-drive output. 3 H-FLY Horizontal Flyback Input (positive Polarity) ...
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... P HASE P ULSE OUTP UT VCO COMP S HAPER BUFFER LOCK DETECT EA SAFETY P ROCES Outputs CC Inhibition P ARABOLA GENERATOR S CORRECTION TDA9103 FREQUENCY S BLKOUT 23 B+-ADJ 39 V REF ENSE R B+OUT COMP REGIN 40 E/WOUT 36 TDA9103 37 3/27 ...
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... TDA9103 QUICK REFERENCE DATA Parameter Horizontal Frequency Range Autosynch Frequency Range (for Given R0, C0) Hor Sync Polarity Input Compatibility with Composite Sync on H-SYNC Input Lock/Unlock Identification on 1st PLL DC Control for H-Position X-RAY Protection Hor DUTY Adjust Stand-by Function Hor S-CAP Switching Control ...
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... DC CONTROL VOLTAGES DCadj DC Voltage Range on DC Controls Parameter Parameter Max. Test conditions Pin 11 Pin 10 Pin 17 Pin 17 Pin 17 Pins Pins Pin 20, sourced current Pin 21, sunk current V = 8V, Pins 2-14-15 REF-H TDA9103 Value Unit 300 V -40, +150 C 150 ...
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... TDA9103 Electrical Characteristics (V = 12V Symbol Parameter SUPPLY AND REFERENCE VOLTAGES V Supply Voltage CC Supply Current Reference Voltage for Horizontal Section REF-H I Max Sourced Current on V REF-H REF-H V Reference Voltage for Vertical Section REF-V I Max Sourced Current on V REF-V REF-V INPUT SECTION/PLL1 ...
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... Test conditions See Figure 2 ; internal voltage See Figure 4.3V < V < TDA9103 Min. Typ. Max. Unit 0 Min. Typ. Max. Unit MHz 0 ...
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... TDA9103 VERTICAL SECTION Operating Conditions Symbol Parameter VSVR Vertical Sync Input Voltage Range Electrical Characteristics (V = 12V Symbol Parameter I Pin 23-28-29 Bias Current (Current Sourced BIASP by PNP Base) I Pin 31 Bias Current (Current Sunk by NPN BIASN Base) VSth Vertical Sync Input Threshold Voltage ...
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... Figure 1 : Testing Circuit 4.7k 6.49k 1.8k TDA9103 9/27 ...
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... TDA9103 Figure 2 : Keystone Adjustment 3.8 3.5 3.2 Figure Amplitude Adjustment T/4 Figure Correction Adjustment V 4.0V 3.5V 3.0V 10/ V30pp T/2 3T increase when when increase ...
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... Voltage Controlled Oscillator (VCO). The phase comparatoris a ”phase frequency” type, designed in CMOS technology. This kind of phase detector avoids locking on false frequencies followed by a ”charge pump”, composed of 2 cur- rent sources sink and source (I = 1mA typ.) TDA9103 T 1.6V 11/27 ...
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... TDA9103 Figure 8 : Principle Diagram Horizontal INPUT 17 Input INTERFACE The dynamic behaviour of the PLL is fixed by an external filter which integrates the current of the charge pump. A ”CRC” filter is generally used. PLL1 is inhibited by applying a high level on Pin 35 (PLLinhib) which is a TTL compatible input. The inhibi- tion results from the opening of a switch located be- tween the charge pump and the filter (see Figure 8) ...
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... From A Phase NOR1 Comparator The TDA9103 also includes a LOCK/UNLOCK identification block which sense in real-time wheather the PLL is locked on the incomming horizontal sync signal or not. The resulting informa- tion is available on safety blanking output (Pin 23) where it is mixed with others information (see Fig- ure 11) ...
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... TDA9103 PLL2 Figure 14 : Dual PLL Block Diagram C Lockdet LOCKDET Horizontal INPUT 17 COMP1 Input INTERFACE Cap Adjust Rapcyc PH12 2 1 RAP CYC VA VB PWM The PLL2 ensures the coincidence between the leading edge of the shaped flyback signal and a phase reference signal obtained by comparison of the sawtooth of the VCO and a constant DC voltage (3 ...
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... The power supply works in synchronism with the horizontal scanning. The switching power transis- tor (external to the TDA9103) is switched on at the beginning of the positive slope of the horizontal sawtooth switched off as required by the integrated regulator. The current in the switching ...
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... REF REGULATOR 4.8V Hamp Adjust The following functions are implemented in the TDA9103 : - A DC controlled variable gain amplifier allowing a variation of 14% of the voltage reference. This is used to set the horizontal image ampli- tude erroramplifier, the non inverting input of which is connected to the above mentioned adjustable voltage reference ...
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... 5 REF + E/W-AMP Charge Current R 19R Transconductance Amplifier V REF V REF 27 25 Osc Cap Sampling Cap EW-OUT 36 VERT-AMP 38 37 KEYST EW-AMP TDA9103 and V set to 4V 8V. REF ( /4) and REF H 29 S-CENTER S-AMP 28 S Correction 30 VERT-OUT 31 17/27 ...
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... TDA9103 Function When the synchronisation pulse is not present, an internal current source sets the free running fre- quency. For an external capacitor, C the typical free running frequency is 84Hz. Typical free running frequency can be calculated 1 OSC A negative or positive TTL level pulse applied on Pin 34 (VSYNC) can synchronise the ramp in the frequency range [fmin, fmax] ...
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... REF D22 Q4 D23 Figure D26 HFLY 3 D27 Figure D31 S4/S3/S2/S1 Pins 6-7-8-9 D30 M20 Figure 24 HDUTY 2 1 PLL2C Figure 26 Q15 Q13 Figure 28 Q33 Q32 TDA9103 D25 D24 Q16 V CC D29 5 HREF D28 V CC D34 10 C0 D35 19/27 ...
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... TDA9103 INTERNAL SCHEMATICS (continued) Figure 29 Q46 Q69 R0 11 Figure D13 HLOCK-CAP 13 D14 M11 Figure 33 Q22 V CC D24 Q21 15 Q23 H-POS D25 Figure HSYNC Q1 D0 20/27 Figure D10 PLL1F Figure D20 FH-MIN Q15 14 D19 Q17 ...
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... V V 12V CC VCAP 27 Figure 40 V REF PNP V CC VS-AMP 28 PNP NPN Figure 38 NMOS NPN PMOS NPN V REF CC V REF PNP PNP NPN PNP NPN NPN Figure NPN VS-CENT 29 TDA9103 V CC NPN V 26 REF NMOS V REF PNP PNP NPN NPN NPN 21/27 ...
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... TDA9103 INTERNAL SCHEMATICS (continued) Figure NPN 30 VOUT PNP Figure NPN V DCOUT PNP 32 NPN PNP Figure REF PNP VSYNC 34 PNP 22/27 Figure REF CC NPN 31 V-AMP NPN Figure REF PNP V-POS 33 PNP NPN Figure REF CC NPN ...
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... Q23 V CC D28 Q26 39 B+-ADJ Q24 D27 Figure Q16 D18 41 COMP Q14 D17 Q15 Figure 49 V PNP KEYST 38 Figure 51 D21 REGIN 40 D22 Figure 53 I SENSE TDA9103 V CC REF PNP PNP NPN NPN V CC Q20 Q19 V CC D13 42 Q10 D12 23/27 ...
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... TDA9103 APPLICATION DIAGRAM 10k 3.9 R28 120k R29 10k 3.9 R25 k 120 R26 10k 3.9 R22 k 120 R23 10k 3.9 R19 k 120 R20 10k 3.9 R16 k 120 R17 10k 3.9 R13 10k 3.9 R10 0k 12 R11 3 ...
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... A demonstration board has been developped by SGS-THOMSON and is available through your usual SGS-THOMSON office. This board has been designed in order to give first the possibility to evaluate the TDA9103 in STAND ALONE, and then to be easily connected to an existing monitor. In stand alone evaluation, for exemple, flyback ...
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... TDA9103 Figure 55 26/27 ...
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... SDIP42 Max. Min. 5.08 0.020 4.57 0.120 0.56 0.0142 1.14 0.030 0.38 0.0090 38.35 1.490 16.00 0.60 14.48 0.50 18.54 1.52 3.56 0. system, is granted provided that the system conforms to TDA9103 .015 0,38 Gage Plane e3 e2 Inches Typ. Max. 0.200 0.150 0.180 0.0181 0.0220 0.040 0.045 0.0098 0.0150 1.5 1.510 0.629 0.540 0.570 ...