TDA9112 SGS-Thomson-Microelectronics, TDA9112 Datasheet
TDA9112
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TDA9112 Summary of contents
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... Bus-controlled output voltage Synchronization on hor. frequency with phase selection Selectable polarity of drive signal DESCRIPTION The TDA9112 is a monolithic integrated circuit as- sembled in a 32-pin shrink dual-in-line plastic package. This IC controls all the functions related to horizontal and vertical deflection in multimode or multi-frequency computer display monitors. ...
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CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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9.8.3 -X-ray protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... TDA9112 1 - PIN CONFIGURATION H/HVSyn HLckVBk HPLL2C HPLL1F HVDyCor BComp BRegIn BISense 4/ VDyCor VSyn 2 31 SDA 3 30 SCL HOscF 29 Vcc 4 28 BOut GND HGND 7 26 HOut RO 25 XRay EWOut HPosF 10 23 VOut 11 22 VCap HFly 21 VGND 12 RefOut 13 20 ...
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... VDyCor VOut VEHTIn HEHTIn H-drive HOut 26 buffer Safety 25 XRay processor 28 BOut B+ 16 BIsense DC/DC converter BRegIn 15 controller B+ ref. BComp 14 HV-dynamic correction (focus,brightness) HVDyCor 11 HVDyCor V-amplitude HVDyCor H-amplitude HVDyCor H-symmetry EW generator H size Pin cushion EWOut 24 Keystone Top corners Bottom corners TDA9112 ...
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... TDA9112 3 - PIN FUNCTION REFERENCE Pin Name 1 H/HVSyn TTL compatible Horizontal / Horizontal and Vertical Sync. input 2 VSyn TTL compatible Vertical Sync. input 3 HLckVBk Horizontal PLL1 Lock detection and Vertical early Blanking composite output 4 HOscF High Horizontal Oscillator sawtooth threshold level Filter input ...
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... Tracking of horizontal waveform component with Horizontal size/EHT Tracking of vertical waveforms (component) with V. size & position DC/DC controller section Step-up/Step-down conversion mode Internal/External sawtooth configuration Bus-controlled output voltage Soft start/Soft stop feature Positive (N-MOS)/Negative(P-MOS) polarity of BOut signal TDA9112 Value Unit SDIP ...
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... TDA9112 5 - ABSOLUTE MAXIMUM RATINGS All voltages are given with respect to ground. Currents flowing from the device (sourced) are signed negative. Currents flowing to the device are signed positive. Symbol V Supply voltage (pin Vcc) CC Pins HEHTIn, VEHTIn, XRay, HOut, BOut Pins H/HVSyn, VSyn, SCL, SDA ...
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... Polarity detection time (after change) HPolDet Parameter 0 Test Condit ions V = 12V 12V -2mA CC RefO Test Condit ions Pin H/HVSyn Pins H/HVSyn, VSyn Pins H/HVSyn, VSyn Pin H/HVSyn, cap. on pin CO = 820pF Pin H/HVSyn TDA9112 Value Unit C/W Value Units Min. Typ. Max. 10 7.65 8.0 8.2 ...
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... TDA9112 6.4 - HORIZONTAL SECTION Vcc = 12V amb Symbol Parameter PLL1 I Current load on RO pin RO C Capacitance on CO pin CO f Frequency of hor. oscillator HO f Free-running frequency of hor. oscill. HO(0) f Hor. PLL1 capture frequency HOCapt f Temperature drift of free-running freq ---------------------------- - Average horizontal oscillator sensitivity ...
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... TCAC (Sad13h) full (9) span VPOS at medium VSIZE at minimum VSIZE at medium VSIZE at maximum BCAC (Sad14h) full (9) span VPOS at medium VSIZE at minimum VSIZE at medium VSIZE at maximum positions always meet this condition. The formula to calculate CO =0.12125/( HO( TDA9112 Value Units Min. Typ. Max. 1.0 % 1.8 % 2.8 % 1.75 % 2.2 % 2.8 % 1. ...
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... TDA9112 6.5 - VERTICAL SECTION V = 12V amb Symbol Parameter AGC-controlled vertical oscillator sawtooth; Ext. load resistance on R (10) L(VAGCCap) VAGCCap pin Sawtooth bottom voltage on V (11) VOB VCap pin Sawtooth top voltage on VCap V VOT pin t Sawtooth Discharge time VODis f Free-running frequency VO(0) f AGC loop capture frequency ...
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... HEHT HEHT RefO (18)(19)(21)(23)(30) 100 (15 (19)(20)(21)(23)(24)(25) (26)(30) VSIZE at maximum PCC (Sad0C): x0000000b x1000000b 0.7 x1111111b 1.5 Tracking with VSIZE : PCC at x1000000b VSIZE (Sad07): x0000000b 0.25 x1000000b 0.5 (19)(20)(21)(24)(27)(29)(30) PCC at x1111111b VPOS (Sad08): x0000000b 0.52 x1111111b 1.92 TDA9112 Units Max. 6 RefO V/V V/V ppm 13/51 ...
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... TDA9112 Symbol Parameter Keystone correction component V of the EW-drive signal on EW-Key EWOut pin Top corner correction compo- V nent of the EW-drive signal on EW-TCor EWOut pin Bottom corner correction compo- V nent of the EW-drive signal on EW-BCor EWOut pin V Tracking of EW-drive signal with EW -------------------------------------------------------- - horizontal frequency ...
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... HO (38) (23) at x1000000b VSIZE HVDC-VAMP (Sad06): x0000000b x1000000b x1111111b HVDC-VAMP at maxi- mum VSIZE (Sad07): x0000000b x1111111b HVDC-VAMP at maxi- mum VPOS (Sad08): (37) x0000000b x1111111b TDA9112 Value Units Min. Typ. Max 2.1 V 200 ppm/ C 3.7 V 1 (1.34 (1.07) +24 ...
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... TDA9112 Symbol Parameter Vertical Dynamic Correction outpu t VDyCor Current delivered by VDyCor out- I VDyCor put DC component of the drive signal V VD-DC on VDyCor output Amplitude of V-parabola on VDy (40) VD-V Cor output Tracking of V-parabola on VDyCor VD V – vr -------------- ---------- ----------- ---------- ---- - output with vertical position = ...
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... BREF (Sad03): x0000000b x1000000b x1111111b V =8V (43) RefO V V (BIsense) ThrBIsConf H BOutPh = ”0” . The same values to be found on pin BRegIn, while regulation loop internal sawtooth configuration for (BIsense) ThrBIsConf TDA9112 Value Units Min. Typ. Max 100 dB 6 MHz -0.2 A -0.5 2 ...
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... TDA9112 6.9 - MISCELLANEOUS V = 12V amb Symbol Parameter Vertical blanking and horizontal lock indication composite output HLckVBk I Sink current to HLckVBk pin SinkLckBk V Output voltage on HLckVBk output OLckBk Horizont al moiré canceller moi re – -------------------------------------- - Modulation moiré function Vertical moiré ...
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... C-correction 0A VOut x1111111 Byte Waveform V amp(min) V mid(VOut) V amp(max) V mid(VOut) 3.5V V mid(VOut) 3.5V V mid(VOut) V mid(VOut) 3.5V V VOamp Null V VOS-cor V VOamp Max. 1 VOamp V VOC-cor 0 1 VOamp Null V VOamp V VOC-cor 0 1 TDA9112 Effect on Screen 19/51 ...
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... TDA9112 Function Sad Pin x0000000: Vertical moiré 0B VOut amplitude x1111111: 0000000x Horizontal size 10h EWOut 1111111x x0000000 Keystone 0D EWOut correction x1111111 x0000000 Pin cushion 0C EWOut correction x1111111 x1111111 Top corner 0E EWOut correction x0000000 x1111111 Bottom corner 0F EWOut correction x0000000 20/51 Byte ...
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... TCAC(max) static H-phase 0 1 BCAC(min) static H-phase 0 1 static H-phase t BCAC(max 1 VDyCorPo V VD-V(max) V VD- VD-V(max) V VD- VDyCorPo V VD-V(max) V VD- TDA9112 Effect on Screen Application dependent 21/51 ...
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... TDA9112 Function Sad Pin x0000000 HVDyCor vertical 06 HVDyCor amplitude x1111111 HVDyCor 04 horizontal & HVDyCor adjustments 05 Note 49: For any H and V correction component of the waveforms on EWOut and VOut pins and for internal waveform for corrections of H asymmetry, displayed in the table, the weight of the other relevant components is nullified (minimum for parabola, S-correction, medium for keystone, all corner corrections, C-correction, parallelogram, parabola asymmetry correction, written in corresponding registers) ...
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... PCC (Pin cushion correction KEYST (Keystone correction TCC (Top corner correction BCC (Bottom corner correction HSIZE (Horizontal size TDA9112 Reserved ...
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... TDA9112 Sad Reserved 1 12 Reserved 1 13 Reserved 1 14 Reserved 1 VDyCorPol 15 0: ” ” 1 XRayReset VSyncAuto VSyncSel effect 1: On 0:Comp 1: Reset 1:Sep (52) (52) 0: Off 0: Off 0: Off READ MODE (SLAVE ADDRESS = 8D) XX HLock VLock XRayAlarm 0: Locked 0: Locked 1: On (51) 1: Not locked 1: Not lock ...
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... HLckVBk is per- manent Sad17/D1 - VOutEn Vertical Output Enable 0: Disabled, V offVOut Vertical section) 1: Enabled, vertical ramp with vertical position offset on VOut pin TDA9112 of status register effect Bus data transfer into reg- bit. Also see de- SDetReset bit has no effect VSyncSel 2 C Bus data transfer into reg- bit ...
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... TDA9112 Sad17/D2 - HBOutEn Horizontal and B+ Output Enable 0: Disabled, levels corresponding to “power transistor off” on HOut and BOut pins (high for HOut, high or low for BOut, depending on bit). BOutPol 1: Enabled, horizontal deflection drive signal on HOut pin providing that it is not inhibited by another internal event (activated XRay protection) ...
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... C bus status register (5 flags: VDet, HVDet, C bus VExtrDet, VPol, HVPol). The device is equipped with an automatic mode (switched on or off by 2 VSyncAuto I C bus bit) that also uses the detec- tion information. TDA9112 2 C bus sub bus bus device has no attrib bus bit ...
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... TDA9112 Figure 2. Horizontal sync signal Positive T H Negative 9.2.2 - Sync. presence detection flags The sync. signal presence detection flags in the status register (VDet, HVDet, VExtrDet) do not Figure 3. Extraction of V-sync signal from H/V-sync signal H/V-sync PulseHsyn Internal Integration Extracted V-sync 9.2.3 - MCU controlled sync. selection mode ...
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... HPOS . PLL1InhEn 2 V-sync (extracted Lock Status HPLL1F (pin & PLL High INHIBITION CHARGE PUMP HPosF Low 10 PLL1Pump SHAPER TDA9112 C 1 disabled through HOscF VCO HOSC HPOS 29/51 ...
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... TDA9112 Figure 6. Horizontal oscillator (VCO) schematic diagram (PLL1 filter HPLL1F + from charge pump 9.3.3 - Voltage controlled oscillator The VCO makes part of both PLL1 and PLL2 loops, being an “output” to PLL1 and “input” to PLL2. It delivers a linear sawtooth. Figure 6 ex- plains its principle of operation. The linears are ob- ...
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... The behaviour of horizontal moiré opti- mised for different deflection design configurations bus using HMoiré bus bit. This bit kept at 0 TDA9112 2 C bus bit HBOutEn is set 26 HOut int. ext bus bit or after re- ...
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... TDA9112 for common architecture (B+ and EHT common regulation) and at 1 for separated architecture (B+ and EHT each regulated separately). Figure 10. Control of HOut and BOut at start/stop at nominal V V (HPosF) V HPosMax V HBNorm V BOn V Soft start HOn Start Start HOut BOut HOut H-duty cycle BOut (positive) B-duty cycle 9 ...
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... All of them are adjustable via I BUS CONTROL REGISTER MAP chapter. Refer to Figure 12, Figure 13 and to chapter TYP- ICAL OUTPUT WAVEFORMS. The correction TDA9112 V RefO V value (and so RefO 2 C bus control ...
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... TDA9112 waveforms have no effect in the vertical middle of the screen (if the VPOS control is adjusted to its medium value). As they are summed, the resulting waveform tends to reach its maximum span at top and bottom of the picture. The voltage at the EWOut is top and bottom limited (see parameter V ) ...
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... C) 2 HDyCorTr ( VDyCorPol (I C) HVDC-VAMP PCC (I C) TCC (I C) Tracking HEHTIn/HSize 2 BCC ( Tracking KEYST (I C) with Hor Frequency 2 PCAC ( horizontal 2 TCAC (I C) dyn. phase control 2 BCAC ( PARAL (I C) TDA9112 VDyCor 32 HVDyCor HSize 17 HEHTIn 24 EWOut 35/51 ...
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... TDA9112 Figure 13. EWOut output waveforms V (EWOut) V EW-Key Keystone alone V V (VCap) (VCap 9.6 - DYNAMIC CORRECTION OUTPUTS SECTION 9.6.1 - Composite horizontal and vertical dynamic correction output HVDyCor A composite waveform is output on pin HVDyCor. It consists of a parabola of vertical deflection fre- quency, on which a parabola of horizontal deflec- tion frequency is superimposed ...
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... H-flyback. The output is set On at the end of the short pulse generated by the monostable trigger. Timing of reset of the R-S flip-flop affects duty cy- cle of the output square signal and so the energy transferred from DC/DC converter input to its out- put. A reset edge is provided by comparator C3 if TDA9112 V HVD-H V HVD-DC V ...
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... TDA9112 the voltage on pin BISense exceeds the internal threshold V . This represents current limi- ThrBIsCurr tation if a voltage proportional to the current through the power component or deflection stage is available on pin BISense. This threshold is af- fected by voltage on pin HPosF, which rises at soft start and descends at soft stop. This ensures self- contained soft control of duty cycle of the output signal on pin BOut ...
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... The XRayAlarm I bus flag is set inform the MCU. This protection is latched; it may be reset either drop bus bit XRayReset(see chapter BUS CONTROL REGISTER MAP). TDA9112 Internal sawtooth configuration type BOut I3 P type BOutPol 2 ...
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... TDA9112 Figure 16. Safety functions - block diagram HBOutEn supervision V CC CCEn + V CCDis _ 29 Vcc XRayReset XRay ThrXRay H-VCO HFly discharge control ThrHFly VOutEn BlankMode HlockEn H-lock detector R Q V-sawtooth discharge S V-sync 40/51 HPosF ...
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... X-ray protection is ac- V CCDis tive or if the V-drive signal is disabled by VOutEn bus bit blank/blank level L2 - H-lock/unlock level L1 (H) L1 +L2 (L) (H) L1 +L2 (H) (L) No Yes Yes No TDA9112 2 C bus bit, when 2 C bus bit, is also V CCEn +L2 (H) Yes No 41/51 ...
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... TDA9112 Figure 18. Ground layout recommendations 42/ TDA9112 General Ground ...
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... INTERNAL SCHEMATICS Figure 19. 5V Pins 1-2 200 H/HVSyn VSyn Figure 20. 12V 13 RefOut HLckVBk l 3 Figure 21. 12V Pin 13 HOSCF Pin 4 Figure 22. RefOut 12V 13 5 HPLL2C Figure 23. 12V RefOut Figure 24. 12V RefOut TDA9112 43/51 ...
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... TDA9112 Figure 25. HPLL1F 9 Figure 26. RefOut 12V HPosF 10 Figure 27. 12V 12V HVDyCor 11 44/51 Figure 28. 12V HFly 12 Figure 29. BComp 14 Figure 30. 12V 15 BRegIn ...
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... Figure 31. 12V BIsense 16 Figure 32. 12V 18 VEHTIn 17 HEHTIn Figure 33. 12V Pin 13 VOSCF 19 Figure 34. 12V VAGCCap 20 Figure 35. 12V 22 VCap Figure 36. 12V VOut 23 TDA9112 45/51 ...
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... TDA9112 Figure 37. 12V 24 EWOut 32 VDyCor Figure 38. 12V XRay 25 Figure 39. 12V 26 HOut 28 BOut 46/51 Figure 40. 30 SCL 31SDA ...
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... TDA9112 Inches Typ. Max. 0.148 0.200 0.140 0.180 0.018 0.023 0.040 0.055 0.010 0.014 1.100 1.120 0.410 0.435 0.350 0.370 ...
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... TDA9112 12 - GLOSSARY AC Alternate Current ACK ACKnowledge bit of I AGC Automatic Gain Control COMP COMParator CRT Cathode Ray Tube DC Direct Current EHT Extra High Voltage EW East-West H/W HardWare HOT Horizontal Output Transistor Inter-Integrated Circuit IIC Inter-Integrated Circuit MCU Micro-Controller Unit NAND Negated AND (logic operation) ...
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... Bloc diagram : addition of Hsize under E/W correction Quick Reference Data: Addition of parrallelogram Register Map: subaddress 08: 0:No tracking Few corrections in text. September 2000 Version 3.6 In Horizontal Moiré Cancellation: HMOIRE (pin) becomes HMOIRE (field register). In vertical Dynamic correction Output: VDyCorPol (register) becomes VDyCorPol (bit). January 2001 version 3.7 revision follow-up TDA9112 2 ...
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... TDA9112 page 7: value for autosync frequency ratio replaced : 4.28 instead of 4.5 previously April 19, 2001 version 3.8 First display on Internet Page 14: parameter VEW-BCor: correction of test condition: saOF instead of OE previously. DATASHEET April 27, 2001 version 4.0 New values from some electrical characteristics page 9: VRefO page10: VHPosF and VTopHPLL2C ...
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... STMicroelectronics Group of Companies Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain Sweden - Switzerland - United Kingdom - United States Patent. Rights to use these 2 C Standard Specification as defined by Philips. http:// www.st.com TDA9112 51/51 ...