IS41C16105-50T Integrated Silicon Solution, IS41C16105-50T Datasheet

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IS41C16105-50T

Manufacturer Part Number
IS41C16105-50T
Description
5V 1M x 16(16-MBIT) dynamic RAM with fast page mode
Manufacturer
Integrated Silicon Solution
Datasheet

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Part Number
Manufacturer
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Price
Part Number:
IS41C16105-50T
Manufacturer:
ISSI
Quantity:
8 000
IS41C16105
IS41LV16105
1M x 16 (16-MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
FEATURES
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval:
• Refresh Mode:
• JEDEC standard pinout
• Single power supply:
• Byte Write and Byte Read operation via two CAS
• Extended Temperature Range -30
• Industrail Temperature Range -40
PIN CONFIGURATIONS
44(50)-Pin TSOP (Type II)
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/03/00
VCC
VCC
VCC
RAS
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
WE
NC
NC
NC
NC
NC
A0
A1
A2
A3
— 1,024 cycles/16 ms
— RAS-Only, CAS-before-RAS (CBR), and Hidden
— 5V ± 10% (IS41C16105)
— 3.3V ± 10% (IS41LV16105)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
GND
42-Pin SOJ
VCC
VCC
RAS
VCC
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
WE
NC
NC
NC
NC
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
o
o
C to 85
C to 85
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
o
o
C
C
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
GND
DESCRIPTION
The
16-bit high-performance CMOS Dynamic Random Access Memo-
ries. Fast Page Mode allows 1,024 random accesses within a single
row with access cycle time as short as 20 ns per 16-bit word. The
Byte Write control, of upper and lower byte, makes the IS41C16105
ideal for use in 16-, 32-bit wide data bus systems.
These features make the IS41C16105 and IS41LV16105 ideally
suited for high-bandwidth graphics, digital signal processing, high-
performance computing systems, and peripheral applications.
The IS41C16105 and IS41LV16105 are packaged in a
42-pin 400-mil SOJ and 400-mil 44- (50-) pin TSOP (Type II).
KEY TIMING PARAMETERS
PIN DESCRIPTIONS
Parameter
Max. RAS Access Time (t
Max. CAS Access Time (t
Max. Column Address Access Time (t
Min. Fast Page Mode Cycle Time (t
Min. Read/Write Cycle Time (t
A0-A9
I/O0-15
WE
OE
RAS
UCAS
LCAS
Vcc
GND
NC
ISSI
IS41C16105 and IS41LV16105 are 1,048,576 x
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
Power
Ground
No Connection
Address Inputs
RAC
CAC
)
)
RC
)
PC
ISSI
)
AA
)
-50
50
13
25
20
84
FEBRUARY 2000
104
-60
60
15
30
25
Unit
ns
ns
ns
ns
ns
®
1

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IS41C16105-50T Summary of contents

Page 1

... Fast Page Mode allows 1,024 random accesses within a single row with access cycle time as short per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41C16105 ideal for use in 16-, 32-bit wide data bus systems. These features make the IS41C16105 and IS41LV16105 ideally suited for high-bandwidth graphics, digital signal processing, high- performance computing systems, and peripheral applications ...

Page 2

... IS41C16105 IS41LV16105 FUNCTIONAL BLOCK DIAGRAM OE WE CAS LCAS CLOCK UCAS GENERATOR RAS RAS CLOCK GENERATOR REFRESH COUNTER ADDRESS BUFFERS A0- CONTROL CAS WE LOGICS DATA I/O BUS COLUMN DECODERS SENSE AMPLIFIERS MEMORY ARRAY 1,048,576 x 16 Integrated Silicon Solution, Inc. — 1-800-379-4774 ISSI OE CONTROL ...

Page 3

... IS41C16105 IS41LV16105 TRUTH TABLE Function Standby Read: Word Read: Lower Byte Read: Upper Byte Write: Word (Early Write) Write: Lower Byte (Early Write) Write: Upper Byte (Early Write) Read-Write (1,2) (2) Hidden Refresh Read Write (1,3) RAS-Only Refresh CBR Refresh (4) Notes: 1. These WRITE cycles may also be BYTE WRITE cycles (either LCAS or UCAS active). ...

Page 4

... I/O tristate logic (in conjunction with OE and WE and RAS). LCAS controls I/O0 through I/O7 and UCAS controls I/O8 through I/O15. The IS41C16105 and IS41LV16105 CAS function is deter- mined by the first CAS (LCAS or UCAS) transitioning LOW and the last transitioning back HIGH. The two CAS controls give the IS41C16105 and IS41LV16105 both BYTE READ and BYTE WRITE cycle capabilities ...

Page 5

... IS41C16105 IS41LV16105 ABSOLUTE MAXIMUM RATINGS Symbol Parameters V Voltage on Any Pin Relative to GND T V Supply Voltage CC I Output Current OUT P Power Dissipation D T Commercial Operation Temperature A Extended Temperature Industrail Temperature T Storage Temperature STG Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device ...

Page 6

... IS41C16105 IS41LV16105 ELECTRICAL CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter I Input Leakage Current IL I Output Leakage Current IO V Output High Voltage Level OH V Output Low Voltage Level OL I Standby Current: TTL Standby Current: CMOS Operating Current ...

Page 7

... IS41C16105 IS41LV16105 (1,2,3,4,5,6) AC CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter t Random READ or WRITE Cycle Time RC Access Time from RAS t RAC Access Time from CAS t CAC t Access Time from Column-Address AA RAS Pulse Width t RAS RAS Precharge Time t RP CAS Pulse Width ...

Page 8

... IS41C16105 IS41LV16105 AC CHARACTERISTICS (Continued) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter t Write Command Hold Time WCR (referenced to RAS) (17) t Write Command Pulse Width WP WE Pulse Widths to Disable Outputs t WPZ Write Command to RAS Lead Time t RWL Write Command to CAS Lead Time ...

Page 9

... IS41C16105 IS41LV16105 AC TEST CONDITIONS Output load: Two TTL Loads and 50 pF (Vcc = 5.0V ±10%) One TTL Load and 50 pF (Vcc = 3.3V ±10%) Input timing reference levels 2.4V 2.0V Output timing reference levels Notes initial pause of 200 µs is required after power-up followed by eight RAS refresh cycle (RAS-Only or CBR) before proper device operation is assured ...

Page 10

... IS41C16105 IS41LV16105 FAST-PAGE-MODE READ CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O OE Note: is referenced from rising edge of RAS or CAS, whichever occurs last OFF RAS t CSH t RSH RCD CAS CLCH RAD RAL t t RAH ASC Column ...

Page 11

... IS41C16105 IS41LV16105 FAST PAGE MODE READ-MODIFY-WRITE CYCLE RAS t t CRP RCD UCAS/LCAS RAD t RAH t ASR ADDRESS Row t RCS RAC t I/O0-I/O15 Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. A 03/03/00 t RASP t CSH t CAS CPWD t CAH t t ASC ASC t AR Column ...

Page 12

... IS41C16105 IS41LV16105 FAST-PAGE-MODE EARLY WRITE CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O 12 (OE = DON'T CARE RAS t CSH t RSH CAS CLCH RCD RAD RAL RAH ASC CAH t ACH Column t CWL t RWL t WCR t t WCS WCH DHR ...

Page 13

... IS41C16105 IS41LV16105 FAST-PAGE-MODE READ WRITE CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O OE Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. A 03/03/00 (LATE WRITE and READ-MODIFY-WRITE Cycles) t RWC t RAS t CSH t t RCD RAD RAH ASC CAH Column t RWD t t RCS CWD ...

Page 14

... IS41C16105 IS41LV16105 FAST PAGE MODE EARLY WRITE CYCLE RAS t t CRP RCD UCAS/LCAS RAD t RAH t ASR ADDRESS Row t WCS WE t WCR OE t DHR t DS I/O0-I/O15 14 t RASP t t CSH t t CAS CAS CAH t ASC t ASC t AR Column Column t t CWL ...

Page 15

... IS41C16105 IS41LV16105 AC WAVEFORMS (With WE-Controlled Disable) READ CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O OE RAS-ONLY REFRESH CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS I/O Integrated Silicon Solution, Inc. — 1-800-379-4774 Rev. A 03/03/00 t CSH t t RCD CAS RAD t t RAH ASC Column ...

Page 16

... IS41C16105 IS41LV16105 CBR REFRESH CYCLE (Addresses; WE DON'T CARE) RAS t RPC t CP UCAS/LCAS I/O (1) HIDDEN REFRESH CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row I/O OE Notes Hidden Refresh may also be performed after a Write Cycle. In this case LOW and OE = HIGH. is referenced from rising edge of RAS or CAS, whichever occurs last. ...

Page 17

... IS41C16105-50K 400-mil SOJ IS41C16105-50T 400-mil TSOP (Type II) IS41C16105-60K 400-mil SOJ IS41C16105-60T 400-mil TSOP (Type II) Package IS41C16105-50KE 400-mil SOJ IS41C16105-50TE 400-mil TSOP (Type II) IS41C16105-60KE 400-mil SOJ IS41C16105-60TE 400-mil TSOP (Type II) Package IS41C16105-50KI 400-mil SOJ IS41C16105-50TI 400-mil TSOP (Type II) IS41C16105-60KI 400-mil SOJ IS41C16105-60TI ...

Page 18

... IS41C16105 IS41LV16105 ORDERING INFORMATION : 3.3V Commercial Range: 0⋅ ⋅ ⋅ ⋅ ⋅ 70⋅ ⋅ ⋅ ⋅ ⋅ C Speed (ns) Order Part No Extended Range: -30⋅ ⋅ ⋅ ⋅ ⋅ 85⋅ ⋅ ⋅ ⋅ ⋅ C Speed (ns) Order Part No Industrial Range: -40⋅ ⋅ ⋅ ⋅ ⋅ 85⋅ ⋅ ⋅ ⋅ ⋅ C Speed (ns) Order Part No ...

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