S-8233BAFT Seiko, S-8233BAFT Datasheet
S-8233BAFT
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S-8233BAFT Summary of contents
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... Internal high-accuracy voltage detection circuit • Over charge detection voltage • Over charge release voltage (The over charge release voltage can be selected within the range where a difference from over charge detection voltage 0.35 V with step) • Over discharge detection voltage ...
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... BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK S-8233B Series Block Diagram VCC CD1 VC1 CD2 VC2 CD3 VSS Remark The delay time for over current detection 2 and 3 is fixed by an internal IC circuit. The delay time cannot be changed via an external capacitor. 2 Reference voltage 1 + − Battery 1 Over charge + − ...
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... Parameter detection voltage V CU S-8233BAFT-TB-G 4.225±0.025 V S-8233BBFT-TB-G 4.325±0.025 V 4.15±0.10 V S-8233BCFT-TB-G 4.200±0.025 V S-8233BDFT-TB-G 4.325±0.025 V 4.15±0.10 V S-8233BEFT-TB-G 4.080±0.025 V 3.90±0.10 V *1. The input voltage of CTL for normal condition is changed by the CTL logic. (Please refer to “ ...
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... Connects battery 1 negative voltage and battery 2 positive voltage 14 CD1 Battery 1 conditioning signal output 15 NC Non connect Positive power input and connects battery 1 positive voltage 16 VCC *1. The NC pin is electrically open. The NC pin can be connected to VCC or VSS. Seiko Instruments Inc. Rev.4.2 Table 2 Description *1 *1 _00 ...
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... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Figure 3 Power Dissipation of Package (When Mounted on Board) ...
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... Current consumption for cell 1 Current consumption for cell 2 Current consumption for cell 3 Current consumption at power down Internal resistance with 0V battery charging function type Resistance between VCC and VMP Resistance between VSS and VMP Internal resistance without 0V battery charging function type. Resistance between VCC and VMP ...
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... V CD3"L" voltage *5 0V battery charging function 0V charging start voltage V *1. If over current detection voltage 1 is 0.50 V, both over current detection voltages 1 and 2 are 0.54 to 0.55 V, but V > IOV2 IOV1 *2. Voltage temperature factor 1 indicates over charge detection voltage, over charge release voltage, over discharge detection voltage, and over discharge release voltage ...
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... IOV2 Set V1, V2, and V3 to 3.5 V and under normal condition. Fix the COVT terminal at V increase V5 gradually from 400 μ ms. The V5 voltage when DOP = 'H' and COP = 'H' is over current detection voltage 3 (V (5) Measurement 5 Measurement circuit 3 Set S1 to ON, V1, V2, and V3 to 3.5 V, and under normal condition and measure current consumption ...
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... IOV2 Set inhibit over discharge detection. Set V1, V2 4.0 V and increase V5 from 6.0 V immediately (within 1 μs) and decrease V1, V2, and time. The time after V5 becomes 6.0 V until DOP goes 'H' is the over current detection delay time 3 (t BATTERY PROTECTION IC FOR 3-SERIAl-CELL PACK ) ...
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... Increase V7 from 0 V gradually. The V7 voltage when μA is the CD3'L' voltage (V ). CD3(L) Set S1 to ON, S2, S3, S4, S5, and S6 to OFF 4 and V3 to 3.5 V and V5, V6, and under over charge condition. Increase V8 from 0 V gradually. The V8 voltage when I8 = 0.1 μA is the CD1'H' voltage (V ). ...
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... Caution At the Measurement circuit from 1 to 10. If the device’s CTL logic is “normal” (S-8233BA, S-8233BC, S-8233BE) then set the CTL voltage at V (V4=0 V the device’s CTL logic is “reverse” (S-8233BB, S-8233BD) then set the CTL voltage at V (V4=V1+V2+V3). CC DOP VCC ...
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... BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK S-8233B Series V6 I6 DOP COP VCC V1 CD1 VC1 S-8233B V2 CD2 VC2 V3 CD3 VSS Test circuit 5 V5 1MΩ DOP COP VCC CD1 V1 VC1 S-8233B CD2 0.47 μF VC2 C2 = 0.1 μ 0.1 μF V3 CD3 VSS Test circuit 7 DOP VCC V1 CD1 ...
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... IOV1 terminal is fixed at the 'L' level and over current detection 1 is inhibited) and returns to the normal condition. Over charge condition If one of the battery voltages becomes higher than the over charge detection voltage (V charging under normal condition and it continues for the over charge detection delay time (t the charging FET turns off to stop charging ...
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... DD t [S]=Delay factor ( 0.10, 0.20, 0.30)×C6 [uF] IOV1 Caution: The delay time for over current detection 2 and 3 is fixed by an internal IC circuit. The delay time cannot be changed via an external capacitor. CTL terminal [If the CTL logic is “normal”]<S-8233BA, S-8233BC, S-8233BE> If the CTL terminal is floated under normal condition pulled up to the V the charging and discharging FETs turn off to inhibit charging and discharging ...
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... When the 0 V charging start voltage (V the charger, the charging FET gate is fixed to V When the voltage between the gate sources of the charging FET becomes equal to or higher than the turn-on voltage by the charger voltage, the charging FET turns on to start charging. At this time, the discharging FET turns off and the charging current flows through the internal parasitic diode in the discharging FET ...
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... V SS Charger connected Load connected Delay *1 Mode *1. Normal mode, Over charge mode, Remark The charger is assumed to charge with a constant current battery V1 battery Hi-z Hi-z Delay Over discharge mode, Over current mode indicates the open voltage of the charger. CHA Figure 6 V2 battery ...
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... V IOV1 terminal V IOV2 V IOV3 Charger connected Load connected Delay t IOV1 *1 Mode If the CTL logic is “reverse” ,it will be exchanged V *1. Normal mode, Over charge mode, Over discharge mode, BATTERY PROTECTION IC FOR 3-SERIAl-CELL PACK V1, V2, and V3 batteries Hi-z Hi-z Delay Delay t IOV2 for Over current mode Figure 8 Seiko Instruments Inc ...
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... pull-up resistor that turns FET-B off when the COP terminal is opened. Connect a 100 kΩ MΩ resistor used to protect the IC if the charger is connected in reverse. Connect a 10 kΩ kΩ resistor. If capacitor C6 is absent, rush current occurs when a capacitive load is connected and the IC enters the over current mode ...
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... If the CTL terminal floats in power-down mode not pulled up in the IC, charging may not be inhibited. However, the over discharge condition becomes effective. At that time, current consumption would be increase because CTL terminal is affected by noise. If the charger is connected, the CTL terminal is pulled up, and charging and discharging are inhibited immediately ...
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... BATTERY PROTECTION IC FOR 3-SERIAL-CELL PACK S-8233B Series Characteristics (Typical Data) 1. Detection voltage temperature characteristics Overcharge detection voltage vs. temperature 4.35 4.25 4.15 -40 - Ta(°C) Overdischarge detection voltage vs. temperature 2.45 2.35 2.25 -40 - Ta(°C) Overcurrent1 detection voltage vs. temperature 0.35 0.30 0.25 -40 - Ta(°C) 20 Overcharge release voltage vs. temperature V =4.25[V] CU 4.20 4.10 4. ...
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... Rev.4.2 _00 2. Current consumption temperature characteristics Current consumption vs. temperature in normal mode -40 - Ta(°C) 3. Delay time temperature characteristics Overcharge detection time vs. temperature 1.5 1.0 0.5 -40 - Ta(°C) Overcurrent1 detection time vs. temperature -40 - Ta(°C) BATTERY PROTECTION IC FOR 3-SERIAl-CELL PACK Current consumption vs ...
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... Ta(°C) 4. Delay time vs. power supply voltage Overcurrent3 (load short) detection time vs. power supply voltage 1.0 0.5 0 VCC [V] Caution Please design all applications of the S-8233B Series with safety in mind =6.0 [ 100 Ta=25[° Seiko Instruments Inc. Rev.4.2 _00 ...
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... Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc ...