AM29LV640MB110RPCI Meet Spansion Inc., AM29LV640MB110RPCI Datasheet
AM29LV640MB110RPCI
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AM29LV640MB110RPCI Summary of contents
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Am29LV640MT/B Data Sheet For new designs, S29GL064M supercedes Am29LV640MT/B and is the factory-recommended migra- tion path for this device. Please refer to the S29GLxxxM Family Datasheet for specifications and ordering information. July 2003 The following document specifies Spansion memory products ...
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For new designs, S29GL064M supercedes Am29LV640MT/B and is the factory-recommended migration path for this device. Please refer to the S29GLxxxM Family Datasheet for specifications and ordering information. Am29LV640MT/B 64 Megabit ( 16-Bit 8-Bit) MirrorBit¥ 3.0 Volt-only ...
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GENERAL DESCRIPTION The Am29LV640MT Mbit, 3.0 volt single power supply flash memory device organized as 4,194,304 words or 8,388,608 bytes. The device has an 8-bit/16-bit bus and can be programmed ...
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MIRRORBIT 64 MBIT DEVICE FAMILY Device Bus Sector Architecture LV065MU x8 Uniform (64 Kbyte) Boot ( Kbyte LV640MT/B x8/x16 at top & bottom) LV640MH/L x8/x16 Uniform (64 Kbyte) LV641MH/L x16 Uniform ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5 Block Diagram . . . ...
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PRODUCT SELECTOR GUIDE Part Number V = 3.0–3.6 V Speed CC Option V = 2.7–3 Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page access time (t ) PACC ...
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CONNECTION DIAGRAMS A15 1 A14 2 3 A13 A12 4 A11 5 6 A10 A19 9 A20 10 WE# 11 RESET# 12 A21 13 WP#/ACC 14 RY/BY# 15 A18 ...
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CONNECTION DIAGRAMS A13 A12 WE# RESET RY/BY# WP#/ACC A17 ...
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PIN DESCRIPTION A21– Address inputs DQ14–DQ0 = 15 Data inputs/outputs DQ15/A-1 = DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# = Chip Enable input OE# = Output ...
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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: Am29LV640M T 120R PC DEVICE ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory ...
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The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This ensures that no spurious alteration of the memory content occurs during the power transition. ...
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the device is deselected during erasure or program- ming, the device draws active current until the operation is completed. Refer to the DC Characteristics table for the standby current specification. Automatic Sleep ...
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Table 2. Am29LV640MT Top Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA28 0011000xxx SA29 0011101xxx SA30 0011110xxx SA31 0011111xxx SA32 0100000xxx SA33 0100001xxx SA34 0100010xxx SA35 0101011xxx SA36 0100100xxx SA37 0100101xxx SA38 ...
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Table 2. Am29LV640MT Top Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA83 1010011xxx SA84 1010100xxx SA85 1010101xxx SA86 1010110xxx SA87 1010111xxx SA88 1011000xxx SA89 1011001xxx SA90 1011010xxx SA91 1011011xxx SA92 1011100xxx SA93 ...
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Table 3. Am29LV640MB Bottom Boot Sector Architecture Sector Address Sector A21–A12 SA0 0000000000 SA1 0000000001 SA2 0000000010 SA3 0000000011 SA4 0000000100 SA5 0000000101 SA6 0000000110 SA7 0000000111 SA8 0000001xxx SA9 0000010xxx SA10 0000011xxx ...
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Table 3. Am29LV640MB Bottom Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA54 0101111xxx SA55 0110000xxx SA56 0110001xxx SA57 0110010xxx SA58 0110011xxx SA59 0100100xxx SA60 0110101xxx SA61 0110110xxx SA62 0110111xxx SA63 0111000xxx SA64 ...
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Table 3. Am29LV640MB Bottom Boot Sector Architecture (Continued) Sector Address Sector A21–A12 SA109 1100110xxx SA110 1100111xxx SA111 1101000xxx SA112 1101001xxx SA113 1101010xxx SA114 1101011xxx SA115 1101100xxx SA116 1101101xxx SA117 1101110xxx SA118 1101111xxx SA119 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip- ment to automatically match ...
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Sector Group Protection and Unprotection The hardware sector group protection feature disables both program and erase operations in any sector group. In this device, a sector group consists of four adjacent sectors that ...
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Table 6. Am29LV640MB Bottom Boot Sector Protection (Continued) Sector A21–A12 SA55–SA58 01100XXXXX SA59–SA62 01101XXXXX SA63–SA66 01110XXXXX SA67–SA70 01111XXXXX SA71–SA74 10000XXXXX SA75–SA78 10001XXXXX SA79–SA82 10010XXXXX SA83–SA86 10011XXXXX SA87–SA90 10100XXXXX SA91–SA94 10101XXXXX SA95–SA98 10110XXXXX SA99–SA102 ...
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START PLSCNT = 1 RESET Wait 1 µs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h ...
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SecSi (Secured Silicon) Sector Flash Memory Region The SecSi (Secured Silicon) Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The SecSi Sector is ...
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START If data = 00h, RESET# = SecSi Sector unprotected. If data = 01h, SecSi Sector is Wait 1 ms protected. Write 60h to any address Remove ...
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Addresses Addresses (x16) (x8) 10h 20h 0051h 11h 22h 0052h 12h 24h 0059h 13h 26h 0002h 14h 28h 0000h 15h 2Ah 0040h 16h 2Ch 0000h 17h 2Eh 0000h 18h 30h 0000h 19h 32h ...
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Addresses Addresses (x16) (x8) Data 27h 4Eh 0017h 28h 50h 0002h 29h 52h 0000h 2Ah 54h 0005h 2Bh 56h 0000h 2Ch 58h 0002h 2Dh 5Ah 007Fh 2Eh 5Ch 0000h 2Fh 5Eh 0020h 30h ...
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Table 11. Primary Vendor-Specific Extended Query Addresses Addresses (x16) (x8) Data 40h 80h 0050h 41h 82h 0052h 42h 84h 0049h 43h 86h 0031h 44h 88h 0033h 45h 8Ah 0008h 46h 8Ch 0002h 47h ...
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non-erase-suspended ...
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controls or timings. The device automatically provides internally generated program pulses and verifies the programmed cell margin. Tables 12 address and data requirements for the word program command sequence. Note that the autoselect ...
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The write-buffer programming operation can be sus- pended using the standard program suspend/resume commands. Upon successful completion of the Write Buffer Programming operation, the device is ready to execute the next command. The ...
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Write “Write to Buffer” command and Sector Address Write number of addresses to program minus 1(WC) and Sector Address Write first address/data Yes Abort Write to Buffer Operation? (Note ...
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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Table 13 for program command sequence. Figure 5. Program ...
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The system must write the Program Resume com- mand (address bits are don’t care) to exit the Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ...
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The system can monitor DQ3 to determine if the sec- tor erase timer has timed out (See the section on DQ3: Sector Erase Timer.). The time-out begins from the ris- ing edge of ...
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Erase Suspend/Erase Resume Commands The Erase Suspend command, B0h, allows the sys- tem to interrupt a sector erase operation and then read data from, or program data to, any sector not selected for ...
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Command Definitions Table 12. Command Definitions (x16 Mode, BYTE Command Sequence (Notes) Read (Note 5) 1 Reset (Note 6) 1 Manufacturer ID 4 Device ID (Note 8) 6 SecSi¥ Sector Factory ...
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Table 13. Command Definitions (x8 Mode, BYTE Command Sequence (Notes) Read (Note 5) 1 Reset (Note 6) 1 Manufacturer ID 4 Device ID (Note 8) 6 SecSi¥ Sector Factory Protect 4 ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 14 and the following subsections describe the function ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final ...
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START Read DQ7–DQ0 Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Program/Erase Complete, Write Operation Complete ...
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other system tasks. In this case, the system must start at the beginning of the algorithm when it returns to de- termine the status of the operation (top of Figure 9). DQ5: Exceeded ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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CHARACTERISTICS CMOS Compatible Parameter Parameter Description Symbol (Notes) I Input Load Current ( A9, ACC Input Load Current LIT I Output Leakage Current LO I Reset Leakage Current LR V ...
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TEST CONDITIONS Device Under Test C 6.2 kΩ L Note: Diodes are IN3064 or equivalent Figure 12. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V Input 1.5 ...
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CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV ...
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CHARACTERISTICS A21-A2 A1-A0 Data Bus CE# OE# * Figure shows word mode. Addresses are A1–A-1 for byte mode. February 12, 2004 ...
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CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode ...
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CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during ...
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CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data, ...
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CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data 55h RY/BY# t VCS V CC Notes sector ...
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CHARACTERISTICS Addresses t POLL CE OE# t OEH WE# DQ15 and DQ7 DQ14–DQ8, DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, ...
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CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last ...
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CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested. V ...
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CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Group Protect or Unprotect Data 60h 1 µs CE# WE# OE# * For sector group protect, A6–A0 = 0xx0010. For sector ...
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CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold ...
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CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Single Word/Byte Program Time (Note 3) Accelerated Single Word/Byte Program Time (Note 3) Total Write Buffer Program Time (Note 4) Effective Write ...
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DATA RETENTION Parameter Description Minimum Pattern Data Retention Time February 12, 2004 Test Conditions 150°C 125°C Am29LV640MT/B Min Unit 10 Years 20 ...
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PHYSICAL DIMENSIONS TS 048—48-Pin Standard Pinout Thin Small Outline Package (TSOP Am29LV640MT/B Dwg rev AA; 10/99 February 12, 2004 ...
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PHYSICAL DIMENSIONS FBE063—63-Ball Fine-pitch Ball Grid Array ( February 12, 2004 BGA Package Am29LV640MT/B Dwg rev AF; ...
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PHYSICAL DIMENSIONS LAA064—64-Ball Fortified Ball Grid Array ( BGA Package Am29LV640MT/B February 12, 2004 ...
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REVISION SUMMARY Revision A (April 26, 2002) Initial release. Revision B (May 23, 2002) Changed packaging from 64-ball FBGA to 64-ball For- tified BGA. Changed Block Diagram: Moved V Input/Output Buffers. Changed Note about WP#/ACC pin to indicate internal pullup ...
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Revision C+1 (February 16, 2003) Distinctive Characteristics Corrected performance characteristics. Product Selector Guide Added note 2. Connection Diagrams Changed pin F1 to NC. Ordering Information Corrected Valid Combinations table. Added Note. AC Characteristics ...
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Trademarks Copyright © 2004 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro ...
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