IW4017BD Integral Corp., IW4017BD Datasheet
IW4017BD
Related parts for IW4017BD
IW4017BD Summary of contents
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... Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply LOGIC DIAGRAM PIN PIN 8 = GND TECHNICAL DATA IW4017B ORDERING INFORMATION IW4017BN Plastic IW4017BDW SOIC T = -55 to 125 C for all packages A PIN ASSIGNMENT FUNCTION TABLE Clock Clock Reset Output State * Enable L ...
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IW4017B * MAXIMUM RATINGS Symbol V DC Supply Voltage (Referenced to GND Input Voltage (Referenced to GND Output Voltage (Referenced to GND) OUT I DC Input Current, per Pin IN P Power Dissipation in ...
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DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Minimum High-Level IH Input Voltage V Maximum Low -Level IL Input Voltage V Minimum High-Level OH Output Voltage V Maximum Low-Level OL Output Voltage I Maximum Input IN Leakage Current I Maximum Quiescent CC ...
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IW4017B AC ELECTRICAL CHARACTERISTICS Symbol Parameter f Maximum Clock Frequency max Maximum Propagation Delay, Clock to Decode PLH PHL Output (Figure Maximum Propagation Delay, Clock to Carry PLH PHL Output (Figure 1) t ...
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Figure 1. Switching Waveforms Timing diagram IW4017B 33 ...
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IW4017B 34 EXPANDED LOGIC DIAGRAM ...