AM29F002NBB-90JC Meet Spansion Inc., AM29F002NBB-90JC Datasheet
AM29F002NBB-90JC
Related parts for AM29F002NBB-90JC
AM29F002NBB-90JC Summary of contents
Page 1
Data Sheet The following document contains information on Spansion memory products. Continuity of Specifications There is no change to this data sheet as a result of offering the device as a Spansion product. Any changes that have been made are ...
Page 2
THIS PAGE LEFT INTENTIONALLY BLANK. ...
Page 3
DATA SHEET Am29F002B/Am29F002NB 2 Megabit (256 K x 8-Bit) CMOS 5.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS ■ Single power supply operation — 5.0 Volt-only operation for read, erase, and program operations — Minimizes system level requirements ■ Manufactured ...
Page 4
GENERAL DESCRIPTION The Am29F002B Family consists of 2 Mbit, 5.0 volt-only Flash memory devices organized as 262,144 bytes. The Am29F002B offers the RESET# function, the Am29F002NB does not. The data appears on DQ7–DQ0. The device is offered in 32-pin PLCC, ...
Page 5
TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . ...
Page 6
PRODUCT SELECTOR GUIDE Family Part Number V = 5.0 V ± Speed Option V = 5.0 V ± 10% CC Max access time ACC Max CE# access time Max OE# access ...
Page 7
CONNECTION DIAGRAMS NC on Am29F002NB RESET# A16 A15 A17 A12 4 29 A14 A13 A11 PDIP 24 ...
Page 8
PIN CONFIGURATION A0–A17 = 18 addresses DQ0–DQ7 = 8 data inputs/outputs CE# = Chip enable OE# = Output enable WE# = Write enable RESET# = Hardware reset pin, active low (not available on Am29F002NB +5.0 V single power ...
Page 9
... AM29F002BT-70 PC, PI, AM29F002BB-70 JC, JI, AM29F002NBT-70 EC, EI, ED, EF AM29F002NBB-70 PD, PF, JD, JF PC, PI, PE, AM29F002BT-90 JC, JI, JE, AM29F002BB-90 EC, EI, EE AM29F002NBT-90 ED, EF, EK AM29F002NBB-90 PD, PF, PK JD, JF, JK November 1, 2006 21527D5 TEMPERATURE RANGE C = Commercial (0°C to +70° Industrial (–40°C to +85° Extended (–55°C to +125°C) ...
Page 10
DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...
Page 11
Status” for more information, and to each AC Charac- teristics section for timing diagrams. Standby Mode When the system is not reading or writing to the device, it can place the device in the standby mode. In this mode, current ...
Page 12
Table 3. Am29F002B/Am29F002NB Bottom Boot Block Sector Address Table Sector A17 A16 SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 1 SA5 1 0 SA6 1 1 Autoselect Mode The autoselect mode provides manufacturer ...
Page 13
Sector protection/unprotection must be implemented using programming equipment. The procedure requires a high voltage ( address pin A9 and the ID control pins. Details on this method are provided in the ...
Page 14
COMMAND DEFINITIONS Writing specific address and data commands or sequences into the command register initiates device operations. The Command Definitions table defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence ...
Page 15
DQ7 or DQ6. See “Write Operation Status” for informa- tion on these status bits. Any commands written to the device during the Embedded Program Algorithm are ignored. On the Am29F002B only, note that a hardware reset during the sector erase ...
Page 16
Sector Erase command is written. If the time between additional sector erase commands can be assumed to be less than 50 µs, the system need not monitor DQ3. Any command other than Sector ...
Page 17
Erase Suspend/Erase Resume Commands The Erase Suspend command allows the system to interrupt a sector erase operation and then read data from, or program data to, any sector not selected for erasure. This command is valid only during the sector ...
Page 18
Command Definitions Table 5. Am29F002B/Am29F002NB Command Definitions Command Sequence (Note 1) Read (Note 5) 1 Reset (Note 6) 1 Manufacturer ID 4 Device ID, 4 Top Boot Block Auto- select Device ID, 4 (Note 7) Bottom Boot Block Sector Protect ...
Page 19
WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 6 and the following subsections describe the functions of these bits. DQ7 and DQ6 each offer a ...
Page 20
DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any ...
Page 21
The DQ5 failure condition may appear if the system tries to program a “1” location that is previously pro- grammed to “0.” Only an erase operation can change a “0” back to a “1.” Under this condition, the ...
Page 22
Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate ...
Page 23
ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
Page 24
DC CHARACTERISTICS TTL/NMOS Compatible Parameter Description I Input Load Current LI A9, OE#, RESET# Input Load Current I LIT (Notes Output Leakage Current Active Read Current (Notes 2, 3) CC1 Active ...
Page 25
DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current LI A9, OE#, RESET# I LIT Input Load Current (Notes Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write ...
Page 26
TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent Figure 8. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted Table ...
Page 27
AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
Page 28
AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded t READY Algorithms) to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...
Page 29
AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...
Page 30
AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data VCS Notes program address program data ...
Page 31
AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data t VCS V CC Notes sector address (for Sector Erase Valid Address for ...
Page 32
AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array ...
Page 33
AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...
Page 34
AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...
Page 35
AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# Notes Program Address Program Data, DQ7# = complement of data written to device, ...
Page 36
ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time (Note 3) Notes: 1. Typical program and erase times assume the following conditions: 25×C, 5 programming typicals assume checkerboard pattern. 2. ...
Page 37
PLCC AND PDIP PIN CAPACITANCE Parameter Symbol Parameter Description C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Notes: 1. Sampled, not 100% tested. 2. Test conditions T = 25° 1.0 MHz. A DATA ...
Page 38
PHYSICAL DIMENSIONS PD 032—32-Pin Plastic DIP Am29F002B/Am29F002NB Dwg rev AD; 10/99 21527D5 November 1, 2006 ...
Page 39
PHYSICAL DIMENSIONS (continued) PL 032—32-Pin Plastic Leaded Chip Carrier November 1, 2006 21527D5 Am29F002B/Am29F002NB Dwg rev AH; 10/99 37 ...
Page 40
PHYSICAL DIMENSIONS (continued) TS 032—32-Pin Standard Thin Small Package Am29F002B/Am29F002NB Dwg rev AA; 10/99 21527D5 November 1, 2006 ...
Page 41
REVISION SUMMARY Revision A (July 1998) Initial release. Revision B (January 1999) Distinctive Characteristics Added: ■ 20-year data retention at 125°C — Reliable operation for the life of the system AC Characterisitics—Read Operations Table Changed the ...
Page 42
Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limita- tion, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as ...