GS84018T-100I GSI Technology, GS84018T-100I Datasheet
GS84018T-100I
Related parts for GS84018T-100I
GS84018T-100I Summary of contents
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TQFP, BGA Commercial Temp Industrial Temp Features • FT pin for user configurable flow through or pipelined operation. • Single Cycle Deselect (SCD) Operation. • 3.3V +10%/-5% Core power supply • ...
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GS84018 100 Pin TQFP Pinout 100 DDQ ...
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GS84032 100 Pin TQFP Pinout 100 DDQ ...
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GS84036 100 Pin TQFP Pinout 100 DDQ ...
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TQFP Pin Description Pin Location 37, 36 35, 34, 33, 32, 100, 99, 82, 81,44, 45, 46, 47, 48, 49 52, 53, 56, 57, 58, 59, 62, 63 68, 69, 72, 73, 74, 75, 78 ...
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GS84018 Pad Out Rev: 2.05 6/2000 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com 119 Bump BGA - ...
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GS84032 Pad Out Rev: 2.05 6/2000 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com 119 Bump BGA - ...
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GS84036Pad Out Rev: 2.05 6/2000 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com 119 Bump BGA - Top ...
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BGA Pin Description Pin Location N4, P4 A2, A3, A5, A6, B3, B5, C2, C3, C5, C6, R2, R6, T3 T2, T6 T2, T6 K7, K6, L7, L6, M6, N7, N6 H7, H6, G7, G6, F6, ...
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GS84018/32/36 Block Diagram Register A0- LBO ADV CK ADSC ADSP Power Down ZZ Control Note: Only x36 version ...
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Mode Pin Functions Mode Name Pin Name State Burst Order Control Output Register Control Power Down Control Note: There are pull up devices on LBO and FT pins and a pull down device on the ZZ pin, so those input ...
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Synchronous Truth Table Operation Address Used Deselect Cycle, Power Down Deselect Cycle, Power Down Deselect Cycle, Power Down Read Cycle, Begin Burst External Read Cycle, Begin Burst External Write Cycle, Begin Burst External Read Cycle, Continue Burst Read Cycle, Continue ...
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Simplified State Diagram Notes: 1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied Low. 2. The upper portion of the diagram assumes active use of only the Enable (E and that ADSP is ...
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Simplified State Diagram with G Notes: 1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use Use of “Dummy Reads” (Read Cycles with G High) may be used to make ...
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Absolute Maximum Ratings ) (All voltages reference Symbol Description V Voltage on V Pins Voltage in V Pins DDQ DDQ V Voltage on Clock Input Pin CK V Voltage on I/O Pins I/O V ...
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Undershoot Measurement and Timing 50% V -2.0V SS 20% tKC Capacitance o (T =25 C, f=1MH , V =3.3V Parameter Control Input Capacitance Input Capacitance Output Capacitance Note: This parameter is sample tested. ...
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AC Test Conditions Parameter Input high level Input low level Input slew rate Input reference level Output reference level Output load Notes: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. ...
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Operating Currents Parameter Test Conditions Symbol Device Selected; Operating Pipeline All other inputs Current Flow-Thru Output open Standby Pipeline 0.2V DD Current Flow-Thru Device Deselected; Deselect Pipeline All other inputs Current V ...
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AC Electrical Characteristics Parameter Clock Cycle Time Clock to Output Valid Pipeline Clock to Output Invalid Clock to Output in Low-Z Clock Cycle Time Clock to Output Valid Flow- Thru Clock to Output Invalid Clock to Output in Low-Z Clock ...
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Write Cycle Timing Single Write ADSP ADSC ADV -An 0 WR1 Hi ...
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Flow Through Read Cycle Timing Single Read ADSP ADSC ADV -An RD1 tOLZ ...
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Flow Through Read-Write Cycle Timing Single Read ADSP ADSC ADV tS tH A0-An RD1 tOE G tKQ Hi-Z ...
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Pipelined SCD Read Cycle Timing Single Read ADSP ADSC ADV RD1 Hi ...
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Pipelined SCD Read - Write Cycle Timing Single Read ADSP ADSC ADV tS tH A0-An RD1 Hi-Z ...
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Sleep Mode Timing Diagram ADSP ADSC ZZ Application Tips Single and Dual Cycle Deselect SCD devices force the use of “dummy read cycles” (read cycles that are launched normally but that are ended with the output drivers ...
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GS 84018/32/36 Output Driver Characteristics 60 Pull Down Drivers -20 -40 Pull Up Drivers -60 -80 -0.5 0 0.5 3. Rev: 2.05 6/2000 Specifications cited are subject to change without notice. For latest documentation see ...
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TQFP Package Drawing Symbol Description Min. Nom. Max A1 Standoff 0.05 A2 Body Thickness 1.35 b Lead Width 0.20 c Lead Thickness 0.09 D Terminal Dimension 21.9 D1 Package Body 19.9 E Terminal Dimension 15.9 E1 Package Body 13.9 e ...
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Package Dimensions - 119 Pin BGA A Pin 1 Corner P N Top View Side View Rev: 2.05 6/2000 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com GS84018/32/36T/B-180/166/150/100 Bottom View ...
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... GS84036T-166 128K x 36 GS84036T-150 128K x 36 GS84036T-100 256K x 18 GS84018T-180I 256K x 18 GS84018T-166I 256K x 18 GS84018T-150I 256K x 18 GS84018T-100I 128K x 32 GS84032T-180I 128K x 32 GS84032T-166I 128K x 32 GS84032T-150I 128K x 32 GS84032T-100I 128K x 36 GS84036T-180I 128K x 36 GS84036T-166I 128K x 36 ...
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... GSI offers other versions this type of device in many different configurations and with a variety of different features, only some of which are covered in this data sheet. See the GSI Technology web site for a complete listing of current offerings. Rev: 2.05 6/2000 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com ...
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Revision History Types of Changes Rev. Code: Old; Format or Content New GS84018/32/36 Rev 1.02c 5/1999; GS84018/32/36 2.00 8/1999D GS84018/32/362.00 8/ 1999;GS84018/32/362.01 9/1999E GS84018/32/362.01 9/ 1999E;GS84018/32/362.02 GS84018/32/362.0210-11/ 1999;GS84018/32/362.032/2000G GS84018/32/362.032/2000G; GS84018_r2_04 84018_r2_04; 84018_r2_05 Rev: 2.05 6/2000 Specifications cited are subject to ...