EN29F002NT-70J ETC-unknow, EN29F002NT-70J Datasheet

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EN29F002NT-70J

Manufacturer Part Number
EN29F002NT-70J
Description
Manufacturer
ETC-unknow
Datasheet

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GENERAL DESCRIPTION
The EN29F002 / EN29F002N is a 2-Megabit, electrically erasable, read/write non-volatile flash memory.
Organized into 256K words with 8 bits per word, the 2M of memory is arranged in seven sectors (with
top/bottom configuration), including one 16K Byte Boot Sector, two 8K Byte Parameter sectors, and four main
sectors (one 32K Byte and three 64K Byte). Any byte can be programmed typically at 10µs. The EN29F002 /
EN29F002N features 5.0V voltage read and write operation. The access times are as fast as 45ns to eliminate
the need for WAIT states in high-performance microprocessor systems.
The EN29F002 / EN29F002N has separate Output Enable ( OE ), Chip Enable ( CE ), and Write
Enable (
either single sector or full chip erase operation, where each sector can be individually protected
against program/erase operations or temporarily unprotected to erase or program. The device can
sustain
EN29F002 / EN29F002N
2 Megabit (256K x 8-bit) Flash Memory
FEATURES
- 45ns, 55ns, 70ns, and 90ns
- 70ns with C
- 45ns, 55ns with C
- Byte program time: 10µs typical
- Sector erase time: 500ms typical
- Chip erase time: 3.5s typical
- 1µA CMOS standby current-typical
- 1mA TTL standby current
- 30mA active read current
- 30mA program / erase current
4800 Great America Parkway, Suite 202
Santa Clara, CA 95054
One 16K byte Boot Sector, Two 8K byte
Read Access Time
High performance program/erase speed
Low Power Active Current
JEDEC Standard program and erase
commands
5.0V ± 10% for both read/write operation
Fast Read Access Time
Sector Architecture:
Parameter Sectors, one 32K byte and
three 64K byte main Sectors
Boot Block Top/Bottom Programming
Architecture
Low Standby Current
W E
a
) controls which eliminate bus contention issues.
load
minimum
= 100pF
load
= 30pF
of
100K
Rev. C, Issue Date: 2001/07/05
program/erase
1
- 32-pin PDIP
- 32-pin PLCC
- 32-pin TSOP (Type 1)
Read and program another sector during
Erase Suspend Mode
JEDEC standard DATA polling and toggle
bits feature
Hardware RESET Pin
Single Sector and Chip Erase
Sector Protection / Temporary Sector
Unprotect ( RESET = V
Sector Unprotect Mode
Embedded Erase and Program Algorithms
Erase Suspend / Resume modes:
0.4 µm double-metal double-poly
triple-well CMOS Flash Technology
Low Vcc write inhibit < 3.2V
100K endurance cycle
Package Options
Commercial and Industrial Temperature
Ranges
EN29F002 / EN29F002N
cycles
This device is designed to allow
on
ID
(n/a for EN29F002N)
)
each
Tel: 408-235-8680
Fax: 408-235-8685
sector.

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EN29F002NT-70J Summary of contents

Page 1

EN29F002 / EN29F002N 2 Megabit (256K x 8-bit) Flash Memory FEATURES 5.0V ± 10% for both read/write operation Read Access Time - 45ns, 55ns, 70ns, and 90ns Fast Read Access Time - 70ns with C = 100pF load - 45ns, ...

Page 2

TABLE 1. PIN DESCRIPTION Pin Name Function A0-A17 Addresses DQ0-DQ7 Data Input/Outputs Chip Enable CE Output Enable Write Enable Hardware Reset RESET Sector Unprotect (n/a for EN29F002N) Vcc Supply Voltage (5V 10% ) Vss Ground TABLE 2. ...

Page 3

BLOCK DIAGRAM Vcc Vss RESET N/A on EN29F002N State Control WE Program Voltage Generator Command Register CE OE Vcc Detector A0-A17 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N Block Protect Switches Erase Voltage Generator ...

Page 4

FIGURE 2. PDIP N/A for EN29F002N FIGURE 3. TSOP A17 WE N/A for EN29F002N RESET FIGURE 4. PLCC DQ0 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N ...

Page 5

TABLE 3. OPERATING MODES USER MODE X X RESET (n/a for EN29F002N) STANDBY H X READ L H OUTPUT DISABLE L H READ L H MANUFACTURER ID READ DEVICE VERIFY SECTOR L H PROTECT ...

Page 6

USER MODE DEFINITIONS Reset Mode EN29F002 features a Reset mode that resets the program and erase operation immediately to read mode. If reset ( = L) is executed when program or erase operation were in progress, the RESET program or ...

Page 7

Device Code can be read as 7F, 92 (hex) for EN29F002T or as 7F, 97 (hex) for EN29F002B (See Table 4). All identifiers for manufacturer and device codes possess odd parity with the DQ7 defined as the parity bit. Write ...

Page 8

Table 5. EN29F002 Command Definitions Write Write Cycle Cycles Command Req’d Sequence Read/Reset Addr 1 XXXh Read/Reset 4 555h Read/Reset 4 555h AutoSelect Manufacturer ID 4 555h AutoSelect Device ID (Top Boot) 4 555h AutoSelect Device ID (Bottom Boot) 4 ...

Page 9

Then the EN29F002 will automatically time the erase pulse width, verify the erase, return the sequence count, provide a erase status through DATA POLLING (data on DQ7 is “0” during the operation and “1” when completed, provided the ...

Page 10

WRITE OPERATION STATUS DQ7 DATA Polling The EN29F002 provides DATA Polling on DQ7 to indicate to the host system the status of the embedded operations. The DATA Polling feature is active during the Byte Programming, Sector Erase, Chip Erase, Erase ...

Page 11

The flowchart for the Toggle Bit (DQ6) is shown in Flowchart 6. The Toggle Bit timing diagram is shown in Figure 9 . DQ5 Exceeded Timing Limits DQ5 will indicate if the program or erase time has exceeded the specified ...

Page 12

Table 6. Status Register Bits DQ Name DATA 7 POLLING ‘-1-0-1-0-1-0-1-’ TOGGLE 6 BIT ‘-1-1-1-1-1-1-1-‘ 5 ERROR BIT ERASE 3 TIME BIT ‘-1-0-1-0-1-0-1-’ 2 TOGGLE BIT Notes: DATA DQ7 Polling: indicates the P/E C status check during Program or Erase, ...

Page 13

DATA PROTECTION Power-up Write Inhibit During power-up, the device automatically resets to READ mode and locks out write cycles. Even with and Low V ...

Page 14

EMBEDDED ALGORITHMS Flowchart 1. Embedded Program Command Sequence Increment No Address Programming Done Flowchart 2. Embedded Program Command Sequence See the Command Definitions section for more information. 5555H / AAH 2AAAH / 55H 5555H / A0H PROGRAM ADDRESS / PROGRAM ...

Page 15

Flowchart 3. Embedded Erase START Write Erase Command Sequence (shown below) Data Polling Device or Toggle Bit Successfully Completed ERASE Done 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N 15 Rev. C, Issue Date: 2001/07/05 ...

Page 16

Flowchart 4. Embedded Erase Command Sequence See the Command Definitions section for more information. Chip Erase 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N Sector Erase 5555H/AAH 2AAAH/55H 5555H/80H ...

Page 17

Flowchart 5. DATA Polling Algorithm Start Read Data DQ7 = Data DQ5 = 1? Yes Read Data DQ7 = Data? No Fail 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N Yes Yes Pass ...

Page 18

Flowchart 6. Toggle Bit Algorithm Start Read Data DQ6 = Toggle? Yes No DQ5 = 1? Yes Read Data DQ6 = Toggle? Yes Fail 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N No No Pass ...

Page 19

Flowchart 7. Temporary Sector Unprotect Algorithm (Not available for EN29F002N) Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Block Unprotect Done (Note 2) Notes: 1. All protected sectors unprotected. 2. All ...

Page 20

ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +125°C Ambient Temperature with Power Applied ...

Page 21

Table 7. DC Characteristics (T = 0°C to 70° 40°C to 85° Symbol Parameter Input Leakage Current I LI Output Leakage Current I LO Supply Current (read) TTL Byte I CC1 Supply Current (Standby) TTL ...

Page 22

Table 8. AC CHARACTERISTICS Read-only Operations Characteristics Parameter Symbols Description JEDEC Standard t t Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable To Output Delay ELQV Output Enable ...

Page 23

Table 9. AC CHARACTERISTICS Write (Erase/Program) Operations Parameter Symbols Description JEDEC Standard t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH DS ...

Page 24

Table 10. AC CHARACTERISTICS Write (Erase/Program) Operations CE Alternate Controlled Writes Parameter Symbols JEDEC Standard Description t t Write Cycle Time AVAV Address Setup Time AVEL Address Hold Time ELAX Data ...

Page 25

Table 11. ERASE AND PROGRAMMING PERFORMANCE Parameter Typ Sector Erase Time 0.3 Chip Erase Time 3 Byte Programming Time 7 Chip Programming Time 2 Erase/Program Endurance 100K Table 12. LATCH UP CHARACTERISTICS Parameter Description Input voltage with respect to Vss ...

Page 26

Table 15. DATA RETENTION Parameter Description Minimum Pattern Data Retention Time 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N Test Conditions 150°C 125°C 26 Rev. C, Issue Date: 2001/07/05 Min Unit 10 Years 20 Years ...

Page 27

SWITCHING WAVEFORMS Figure 5. AC Waveforms for READ Operations Figure 6. AC Waveforms for Chip/Sector Erase Operations Notes the sector address for sector erase. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N ...

Page 28

SWITCHING WAVEFORMS (continued) Figure 7. Program Operation Timings Notes address of the memory location to be programmed data to be programmed at byte address. 3. /DQ7 is the output of the complement of the ...

Page 29

Figure 9. AC Waveforms for Toggle Bit During Embedded Algorithm Operations Notes: *DQ stops toggling (The device has completed the embedded operation). 6 Figure 10. Temporary Sector Unprotect Timing Diagram 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 ...

Page 30

SWITCHING WAVEFORMS (continued) Figure 11. /RESET Timing Diagram Figure 12. Alternate /CE Controlled Write Operation Timings Notes address of the memory location to be programmed data to be programmed at byte address. 3. /DQ7 ...

Page 31

ORDERING INFORMATION EN29F002 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 EN29F002 / EN29F002N I TEMPERATURE RANGE (Blank) = Commercial (0°C to +70° Industrial (-40°C to +85°C) PACKAGE Plastic ...

Page 32

Revisions List A: Preliminary B (2001.07.03): Table 7. Icc3 is with RESET# pin at full CMOS levels Pg. 13 Logical Inhibit section now says that (not recommended usage), it will be considered a write. VID is everywhere changed to be ...

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