A1020B

Manufacturer Part NumberA1020B
ManufacturerActel Corporation
A1020B datasheet
 


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A CT 1 Timi ng C ha ra ct er i s t i cs
(Worst-Case Commercial Conditions)
Output Module Timing
Parameter Description
1
TTL Output Module Timing
t
Data to Pad High
DLH
t
Data to Pad Low
DHL
t
Enable Pad Z to High
ENZH
t
Enable Pad Z to Low
ENZL
t
Enable Pad High to Z
ENHZ
t
Enable Pad Low to Z
ENLZ
d
Delta Low to High
TLH
d
Delta High to Low
THL
1
CMOS Output Module Timing
t
Data to Pad High
DLH
t
Data to Pad Low
DHL
t
Enable Pad Z to High
ENZH
t
Enable Pad Z to Low
ENZL
t
Enable Pad High to Z
ENHZ
t
Enable Pad Low to Z
ENLZ
d
Delta Low to High
TLH
d
Delta High to Low
THL
Notes:
1.
Delays based on 35 pF loading.
2.
SSO information can be found in the “Simultaneous Switching Output Limits for Actel FPGAs” application note on page 4-125.
(continued)
‘–3’ Speed
‘–2’ Speed
‘–1’ Speed ‘Std’ Speed 3.3 V Speed
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units
6.7
7.6
8.7
7.5
8.6
9.8
6.6
7.5
8.6
7.9
9.1
10.4
10.0
11.6
13.1
9.0
10.4
11.8
0.06
0.07
0.08
0.08
0.09
0.10
7.9
9.2
10.4
6.4
7.2
8.2
6.0
6.9
7.9
8.3
9.4
10.7
10.0
11.6
13.1
9.0
10.4
11.8
0.10
0.11
0.13
0.06
0.07
0.08
A C T
1 S eri es FPG As
10.3
15.0
ns
11.5
16.7
ns
10.2
14.8
ns
12.2
17.7
ns
15.4
22.4
ns
13.9
20.2
ns
0.09
0.13 ns/pF
0.12
0.17 ns/pF
12.2
17.7
ns
9.8
14.2
ns
9.2
13.4
ns
12.7
18.5
ns
15.4
22.4
ns
13.9
20.2
ns
0.15
0.22 ns/pF
0.09
0.13 ns/pF
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