OV2610

Manufacturer Part NumberOV2610
DescriptionColor CMOS UXGA (2.0 MPixel) Camera Chip
ManufacturerOmniVision Technologies, Inc.
OV2610 datasheet
 


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Page 21
22
Page 22
23
Page 23
24
Page 24
Page 21/24

Download datasheet (528Kb)Embed
PrevNext
O
mni
ision
Table 11
Device Control Register List
Address
Register
Default
(Hex)
Name
(Hex)
2A
COML
00
2B
FRARL
00
2C
RSVD
XX
2D
ADDVSL
00
2E
ADDVSH
00
2F
YAVG
00
30-31
RSVD
XX
00
32
COMM
(0Fin
SVGA)
33-3D
RSVD
XX
NOTE: All other registers are factory-reserved. Please contact OmniVision Technologies for reference register settings.
Version 1.4, September 15, 2003
R/W
Common Control L
Bit[7]:
Line interval adjustment. Interval adjustment value is in
COML[6:5] and FRARL[7:0] (see
0:
Disabled
1:
Enabled
RW
Bit[6:5]: Line interval adjust value MSB 2 bits
Bit[4]:
Reserved
Bit[3:2]: HSYNC timing end point adjustment MSB 2 bits
Bit[1:0]: HSYNC timing start point adjustment MSB 2 bits
Line Interval Adjustment Value LSB 8 bits
RW
The frame rate will be adjusted by changing the line interval. Each LSB
will add 2/1948 T
in UXGA and 2/974 T
frame
frame period.
Reserved
VSYNC Pulse Width LSB 8 bits
Bit[7:0]: Line periods added to VSYNC width. Default VSYNC
RW
output width is 4 x t
to the VSYNC active period.
VSYNC Pulse width MSB 8 bits
Bit[7:0]: Line periods added to VSYNC width. Default VSYNC
RW
output width is 4 x t
256 x t
to the VSYNC active period.
line
Luminance Average
This register will auto update when COMH[5] = 1 (see
page
19). Average Luminance is calculated from the B/Gb/Gr/R
channel average as follows:
RW
B/Gb/Gr/R channel average =
(BAVG[7:0] + GbAVG[7:0] + GrAVG[7:0] +RAVG[7:0])/4
Reserved
Common Control M
Bit[7]:
Pixel blanking period
1:
Set pixel blanking to 040 to each side of HREF
Bit[6]:
Blank pixel value setting
1:
Set pixel blanking to 010 periods to each side of
RW
HREF. Default pixel blanking is 0.
Bit[5]:
Vertical window end position LSB
Bit[4]:
Vertical window start position LSB
Bit[3:2]: Horizontal window end position LSBs
Bit[1:0]: Horizontal window start position LSBs
Reserved
Proprietary to OmniVision Technologies
Register Set
Description
“FRARL” on page
21).
in SVGA mode to the
frame
. Each LSB count will add 1 x t
line
. Each MSB count will add
line
“COMH” on
line
21