SST49LF040A-33-4C-NH

Manufacturer Part NumberSST49LF040A-33-4C-NH
Description4 Mbit LPC Flash
ManufacturerSilicon Storage Technology, Inc.
SST49LF040A-33-4C-NH datasheets

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3 Mbit / 4 Mbit / 8 Mbit LPC Flash
SST49LF030A / SST49LF040A / SST49LF080A
SST49LF030A / SST49LF040A / SST49LF080A3 Mb / 4 Mb / 8 Mbit LPC Flash
FEATURES:
• LPC Interface Flash
– SST49LF030A: 384K x8 (3 Mbit)
SST49LF040A: 512K x8 (4 Mbit)
SST49LF080A: 1024K x8 (8 Mbit)
• Conforms to Intel LPC Interface Specification 1.0
• Flexible Erase Capability
– Uniform 4 KByte sectors
– Uniform 64 KByte overlay blocks
– 64 KByte Top boot block protection
– Chip-Erase for PP Mode Only
• Single 3.0-3.6V Read and Write Operations
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
– Active Read Current: 6 mA (typical)
– Standby Current: 10 µA (typical)
• Fast Sector-Erase/Byte-Program Operation
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– Chip Rewrite Time:
SST49LF030A: 6 seconds (typical)
SST49LF040A: 8 seconds (typical)
SST49LF080A: 16 seconds (typical)
– Single-pulse Program or Erase
– Internal timing generation
PRODUCT DESCRIPTION
The SST49LF0x0A flash memory devices are designed to
interface with the LPC bus for PC and Internet Appliance
application in compliance with Intel Low Pin Count (LPC)
Interface Specification 1.0. Two interface modes are sup-
ported by the SST49LF0x0A: LPC mode for In-System
operations and Parallel Programming (PP) mode to inter-
face with programming equipment.
The SST49LF0x0A flash memory devices are manufac-
tured with SST’s proprietary, high performance SuperFlash
Technology. The split-gate cell design and thick oxide tun-
neling injector attain better reliability and manufacturability
compared with alternate approaches. The SST49LF0x0A
devices significantly improve performance and reliability,
while lowering power consumption. The SST49LF0x0A
devices write (Program or Erase) with a single 3.0-3.6V
power supply. It uses less energy during Erase and Pro-
gram than alternative flash memory technologies. The total
energy consumed is a function of the applied voltage, cur-
rent and time of application. Since for any give voltage
range, the SuperFlash technology uses less current to pro-
©2002 Silicon Storage Technology, Inc.
S71206-01-000 1/02
554
1
Advance Information
• Two Operational Modes
– Low Pin Count (LPC) Interface mode for
in-system operation
– Parallel Programming (PP) Mode for fast production
programming
• LPC Interface Mode
– 5-signal communication interface supporting
byte Read and Write
– 33 MHz clock frequency operation
– WP# and TBL# pins provide hardware write protect
for entire chip and/or top boot block
– Standard SDP Command Set
– Data# Polling and Toggle Bit for End-of-Write
detection
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
• Parallel Programming (PP) Mode
– 11-pin multiplexed address and 8-pin data
I/O interface
– Supports fast programming In-System on pro-
grammer equipment
• CMOS and PCI I/O Compatibility
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
gram and has a shorter erase time, the total energy con-
sumed during any Erase or Program operation is less than
alternative flash memory technologies. The SST49LF0x0A
products provide a maximum Byte-Program time of 20
µsec. The entire memory can be erased and programmed
byte-by-byte typically in 6 seconds for SST49LF030A, 8
seconds for the SST49LF040A and 16 seconds for the
SST49LF080A, when using status detection features such
as Toggle Bit or Data# Polling to indicate the completion of
Program operation. The SuperFlash technology provides
fixed Erase and Program time, independent of the number
of Erase/Program cycles that have performed. Therefore
the system software or hardware does not have to be cali-
brated or correlated to the cumulative number of Erase
cycles as is necessary with alternative flash memory tech-
nologies, whose Erase and Program time increase with
accumulated Erase/Program cycles.
To meet high density, surface mount requirements, the
SST49LF0x0A devices are offered in 32-lead TSOP and
32-lead PLCC packages. See Figures 1 and 2 for pin
assignments and Table 1 for pin descriptions.
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
Intel is a registered trademark of Intel Corporation.
These specifications are subject to change without notice.

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