F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 
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Page 102/154:

VERTICAL CENTERING REGISTER

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VERTICAL CENTERING REGISTER (XR58)
Read/Write at I/O Address 3B7h/3D7h
Index 58h
D7 D6 D5 D4 D3 D2 D1 D0
Top Border LSBs
This register is used only when non-automatic
vertical centering is enabled.
7-0
Vertical Top Border LSBs (VTB7-0)
Programmed value:
Top Border Height (in scan lines) – 1
This register contains the eight least signif-
icant bits of the programmed value of the
Vertical Top Border (VTB). The two most
significant bits are in the Vertical Line
Insertion Register (XR59).
Revision 0.7
VERTICAL LINE INSERTION REGISTER
(XR59)
Read/Write at I/O Address 3B7h/3D7h
D7 D6 D5 D4 D3 D2 D1 D0
This register is used only in text mode when
vertical line insertion is enabled.
3-0
Vertical Line Insertion Height (VLIH3-
0)
Programmed Value:
Number of Insertion Lines – 1
The value promgrammed in this register - 1
is the number of lines to be inserted
between the rows. Insertion lines are never
double scanned even if double scanning is
enabled. Insertion lines use the background
color.
4
Reserved (0)
6-5
Vertical Top Border MSBs (VTB9-8)
This register contains the two most signif-
icant bits of the programmed value of the
Vertical Top Border (VTB). The eight least
significant bits are in the Vertical Centering
Register (XR58).
7
Reserved (0)
98
Extension Registers
V Line Insertion Height
Reserved
Top Border Bits 8-9
Reserved
Preliminary 65510