F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 


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®
14.31818 MHz
n/c
B30
From System Power Control
RESET
100 ohm
B02
RFSH/
B19
BHE/
C01
AEN
A11
ALE
n/c
B28
BUSCLK
n/c
B20
IOWR/
B13
IORD/
B14
MEMW/
B11
MEMR/
B12
RDY
A10
IRQ9
B04
NMI/
n/c
A01
0WS/
n/c
B08
IOCS16/
n/c
D02
MEMCS16/
D01
HCT27
LA23
C02
LA22
C03
LA21
C04
LA20
C05
LA19
C06
LA18
C07
LA17
C08
A19
A12
A18
A13
A17
A14
A16
A15
A15
A16
A14
A17
A13
A18
A12
A19
A11
A20
A10
A21
A9
A22
A8
A23
A7
A24
A6
A25
A5
A26
A4
A27
A3
A28
A2
A29
A1
A30
A0
A31
+5V = B3, B29, D16
D15
C18
D14
C17
D13
C16
D12
C15
D11
C14
D10
C13
D09
C12
D08
C11
GND = B1, B10,B31,D18
D07
A02
D06
A03
D05
A04
D04
A05
D03
A06
D02
A07
D01
A08
D00
A09
Circuit Example - F65510 Interface to 16-Bit ISA Bus
Revision 0.7
100
25-50 MHz Reference Clock
CLKIN
98
STNDBY/
99
RESET
45
RFSH/
44
BHE/
46
AEN
49
100pF
n/c
ACTIND [ADL/]
2
IOWR/
1
IORD/
48
MEMW/
47
MEMR/
3
RDY
51
IRQ
(ENAVEE)
HCT125
HCT20
different from the 'F' package pinouts!
43
A19
42
A18
41
A17
40
A16
39
A15
37
A14
36
A13
35
A12
34
A11
33
A10
32
A9
31
A8
30
A7
29
A6
28
A5
27
A4
26
A3
25
A2
24
A1
23
A0
50
n/c
VGARD
5
D15
6
D14
7
D13
8
D12
9
D11
10
D10
11
D9
12
D8
14
D7
15
D6
16
D5
17
D4
18
D3
19
D2
20
D1
21
D0
110
Application Schematic Examples
[DISA/]
{DISA/}
<DISA/>
[BHE/]
{BHE/}
<BHE/>
[MIO/]
{PMIO/}
<MIO/>
{PSTART/}
<ADS/>
[SETUP/]
{Reserved}
<LDEV/>
[CMD/]
{PCMD/}
<LCLK>
[S0/]
{Reserved}
<BS16/>
[S1/]
{PRD/}
<RD/>
[RDY]
{PRDY/}
<LRDY/>
[DS16/]
{IRQ}
<IRQ/>
Note: If IRQ is used, ENAVEE
functionality is lost!
F65510
Note: the 'T' package pinouts are
[A19]
(VGAHI)
{VGACS/}
[A18]
[A17]
[A16]
[A15]
[A14]
[A13]
[A12]
[A11]
[A10]
[A9]
[A8]
[A7]
[A6]
[A5]
[A4]
[A3]
[A2]
[A1]
[A0]
{A0}
<BLE/>
[CSFB/]
(ENAVDD)
Note:
Additional data bus drive
may be enabled if required
by setting XR6C bit-3=1.
Alternately, the circuit on the
following page may be used.
Preliminary
65510