F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 


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PIN DESCRIPTIONS
T
F
Pin # Pin # Pin Name
43
45
RFSH/
{DISA/}
[DISA/]
<DISA/>
42
44
BHE/
{BHE/}
[BHE/]
<BHE/>
44
46
AEN
{MIO/}
[MIO/]
<MIO/>
47
49
ACTIND
{PSTART/}
[ADL/]
<ADS/>
99
1
IORD/
{CMD/}
[PCMD/]
<LCLK>
100
2
IOWR/
{Reserved}
[SETUP/]
<LDEV/>
45
47
MEMR/
{RD/}
[S1/]
<RD/>
46
48
MEMW/
{Reserved}
[S0/]
<BS16/>
1
3
RDY
{PRDY/}
[RDY]
<LRDY/>
Note: Pin names in parentheses (...) indicate alternate functions
Pin names in brackets [...] indicate MC bus functionality if different from EISA/ISA (PC/AT) bus
Pin names in braces {...} indicate PI bus functionality if different from EISA/ISA (PC/AT) bus
Pin names in brackets <...> indicate 386 SX/DX Local bus functionality if different from EISA/ISA bus
Revision 0.7
Type
Active Description
In
Low
This pin is an active low signal indicating a Refresh
In
Low
cycle for the EISA/ISA bus. In MC, PI, and Local bus
In
Low
systems, it is connected to the disable signal from
In
Low
system port 102h or tied high. When this pin is low,
display memory is not accessible.
In
Low
Byte High Enable. BHE/ low indicates the high order
In
Low
byte at the current word address is being accessed.
In
Low
In
Low
In
High
In EISA/ISA interface, defines valid I/O address: 0 =
In
Both
valid I/O address, 1 = Invalid I/O address (latched inter-
In
Both
nally). In MC, PI, and Local bus interfaces, indicates
In
Both
memory or I/O cycle: 1 = memory, 0 = I/O.
Out
High
CPU Activity Indicator (EISA/ISA Bus), Address
In
Low
Latch (MC Bus), Start (PI bus), or Address Strobe
In
Low
(Local Bus). Effectively indicates the start of a bus
In
Low
cycle in MC, PI, and Local Buses.
In
Low
In EISA/ISA interface, indicates an I/O Read Cycle. In
In
Low
MC and PI bus interfaces, indicates the beginning of the
In
Low
command part of a bus cycle. Driven by CMD/ on the
In
High
MC bus. This input is a 2x CPU Clock in Local Bus
interface mode.
In
Low
In EISA/ISA interface, indicates an I/O Write Cycle. In
In
Low
MC bus systems, indicates that all on-chip memory and
In
Low
I/O functions should be disabled. In Local bus, this pin
Out
Low
is an output to indicate local bus cycle response.
In
Low
In the EISA/ISA bus, indicates a Memory Read cycle.
In
Low
In MC interface, indicates Status 1. In PI and Local
In
Low
bus, indicates read (low) or write (high) bus cycle.
In
Low
In EISA/ISA bus, indicates a Memory Write cycle. In
In
Low
MC, indicates Status 0. In PI, this input is ignored. In
In
Low
Local Bus, this pin is BS16/ (Bus Size 16-Bit).
Out
Low
S1/
S0/
0
0
0
1
1
0
1
1
Out
High
Ready. Driven low during EISA/ISA/MC bus cycles
Out
Low
to indicate that the current cycle should be extended with
Out
High
wait states. Driven low during PI/LB cycles to indicate
Out
Low
the current cycle should be completed. This signal is
driven high at the end of the cycle, then tristated.
20
Pin Descriptions
System Bus Interface (continued)
Operation
Undefined
Read
Write
Undefined
Preliminary 65510