F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 


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Page 51/154:

HORIZONTAL BLANK START REGISTER

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HORIZONTAL BLANK START
REGISTER (CR02)
Read/Write at I/O Address 3B5h/3D5h
Index 02h
Group 0 Protection
D7 D6 D5 D4 D3 D2 D1 D0
H Blank Start
This register is used for all VGA and EGA modes.
It is also used for 640 column CGA modes and
MDA/Hercules text mode. In all 320 column CGA
modes and Hercules graphics mode, the alternate
register is used.
7-0
Horizontal Blank Start
These bits specify the beginning of
horizontal blank in terms of character clocks
from the beginning of the display scan. The
period between Horizontal Display Enable
End and Horizontal Blank Start is the right
side border on screen.
Revision 0.7
CRT Controller Registers
HORIZONTAL BLANK END
REGISTER (CR03)
Read/Write at I/O Address 3B5h/3D5h
Index 03h
Group 0 Protection
D7 D6 D5 D4 D3 D2 D1 D0
This register is used for all VGA and EGA modes.
It is also used for 640 column CGA modes and
MDA/Hercules text mode. In all 320 column CGA
modes and Hercules graphics mode, the alternate
register is used.
4-0
Horizontal Blank End
These are the lower 5 bits of the character
clock count used to define the end of
horizontal blank. The interval between the
end of horizontal blank and the beginning of
the display (a count of 0) is the left side
border on the screen. If the horizontal blank
width desired is W clocks, the 5-bit value
programmed in this register = [contents of
CR02 + W] and 1Fh. The most significant
bit is programmed in CR05 bit-7. This bit =
[( CR02 + W) and 20h]/20h.
6-5
Display Enable Skew Control
Defines the number of character clocks that
the Display Enable signal is delayed to
compensate for internal pipeline delays.
7
Light Pen Register Enable
This bit must be 1 for normal operation;
when this bit is 0, CRTC registers CR10 and
CR11 function as lightpen readback regis-
ters.
47
H Blank End
DE Skew Control
Light Pen Register Enable
Preliminary 65510