F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 


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Page 64/154:

ENABLE SET/RESET REGISTER

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ENABLE SET/RESET REGISTER (GR01)
Read/Write at I/O Address 3CFh
Index 01h
Group 1 Protection
D7 D6 D5 D4 D3 D2 D1 D0
Enable Set/Reset Bit 0
Enable Set/Reset Bit 1
Enable Set/Reset Bit 2
Enable Set/Reset Bit 3
Reserved
3-0
Enable Set / Reset Planes 3-0
This register works in conjunction with the
Set/Reset register (GR00). The Graphics
Mode register must be programmed to
Write Mode 0 in order for this register to
have any effect.
0 The corresponding plane is written
with the data from the CPU data bus
1 The corresponding plane is set to 0 or
1 as specified in the Set/Reset Register
7-4
Reserved (0)
Revision 0.7
Graphics Controller Registers
COLOR COMPARE REGISTER (GR02)
Read/Write at I/O Address 3CFh
Index 02h
Group 1 Protection
D7 D6 D5 D4 D3 D2 D1 D0
3-0
Color Compare Planes 3-0
This register is used to 'reduce' 32 bits of
memory data to 8 bits for the CPU in 4-
plane graphics mode. These bits provide a
reference color value to compare to data read
from display memory planes 0-3.
Color Don't Care register (GR07) is used to
affect the result. This register is active only
if the Graphics Mode register (GR05) is set
to Read Mode 1. A match between the
memory data and the Color Compare regis-
ter (GR02) (for the bits specified in the
Color Don't Care register) causes a logical 1
to be placed on the CPU data bus for the
corresponding data bit; a mis-match returns
a logical 0.
7-4
Reserved (0)
60
Color Compare (Plane 0)
Color Compare (Plane 1)
Color Compare (Plane 2)
Color Compare (Plane 3)
Reserved
The
Preliminary 65510