F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 


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Page 71/154:

ATTRIBUTE INDEX REGISTER (ARX)

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Attribute Controller and VGA Color Palette Registers
Register
Mnemonic
Register Name
ARX
Attribute Index (for 3C0/3C1h)
AR00-AR0F
Attribute Controller Color Data
AR10
Mode Control
AR11
Overscan Color
AR12
Color Plane Enable
AR13
Horizontal Pixel Panning
AR14
Pixel Pad
DACMASK
Color Palette Pixel Mask
DACSTATE
Color Palette State
DACRX
Color Palette Read-Mode Index
DACX
Color Palette Index (for 3C9h)
DACDATA
Color Palette Data
In regular VGA mode, all Attribute Controller
registers are located at the same byte address (3C0h)
in the CPU I/O space. An internal flip-flop controls
the selection of either the Attribute Index or Data
Registers. To select the Index Register, an I/O Read
is executed to address 3BAh/3DAh to clear this flip-
flop. After the Index Register has been loaded by an
I/O Write to address 3C0h, this flip-flop toggles, and
the Data Register is ready to be accessed. Every I/O
Write to address 3C0h toggles this flip-flop. The
flip-flop does not have any effect on the reading of
the Attribute Controller registers.
Controller index register is always read back at
address 3C0h, the data register is always read back at
address 3C1h.
In one of the extended modes (See "CPU Interface
Register"), the Attribute Controller Index register is
located at address 3C0h and the Attribute Controller
Data register is located at address 3C1h (to allow
word I/O accesses). In another extended mode, the
Attribute Controller can be both read and written at
either 3C0h or 3C1h (EGA compatible mode).
The VGA color palette logic is used to further
modify the video color output following the attribute
controller color registers. The color palette logic is
contained on-chip, however an external color palette
chip may still be used by disabling the internal color
palette (see XR06). DAC logic is provided on-chip
(or in the external 'RAMDAC' chip if used) to
convert the final video output of the color palette to
analog RGB outputs for use in driving a CRT
display.
Revision 0.7
Attribute Controller and Color Palette Registers
Index
00-0Fh
10h
11h
12h
13h
14h
00-FFh
ATTRIBUTE INDEX
REGISTER (ARX)
Read/Write at I/O Address 3C0h
Group 1 Protection
D7 D6 D5 D4 D3 D2 D1 D0
The Attribute
4-0
Attribute Controller Index
These bits point to one of the internal
registers of the Attribute Controller.
5
Enable Video
7-6
Reserved (0)
67
I/O
Protect
Access
Address Group Page
RW
3C0h
1
RW
3C0h/3C1h
1
RW
3C0h/3C1h
1
RW
3C0h/3C1h
1
RW
3C0h/3C1h
1
RW
3C0h/3C1h
1
RW
3C0h/3C1h
1
RW
3C6h
6
R
3C7h
W
3C7h
6
RW
3C8h
6
RW
3C9h
6
Index to
Attribute Controller
Data Registers
Video Enable
Reserved
0 Disable video, allowing the Attribute
Controller Color registers to be
accessed by the CPU
1 Enable video, causing the Attribute
Controller Color registers (AR00-
AR0F) to be inaccessible to the CPU
Preliminary 65510
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