F65510 Attribute Index Register (arx) - Intel Corporation

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F65510

Manufacturer Part Number
F65510
Description
Controllers, Flat Panel VGA Controller
Manufacturer
Intel Corporation
Datasheet
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Revision 0.7
Register
Mnemonic
ARX
AR00-AR0F
AR10
AR11
AR12
AR13
AR14
DACMASK
DACSTATE
DACRX
DACX
DACDATA
In regular VGA mode, all Attribute Controller
registers are located at the same byte address (3C0h)
in the CPU I/O space. An internal flip-flop controls
the selection of either the Attribute Index or Data
Registers. To select the Index Register, an I/O Read
is executed to address 3BAh/3DAh to clear this flip-
flop. After the Index Register has been loaded by an
I/O Write to address 3C0h, this flip-flop toggles, and
the Data Register is ready to be accessed. Every I/O
Write to address 3C0h toggles this flip-flop. The
flip-flop does not have any effect on the reading of
the Attribute Controller registers.
Controller index register is always read back at
address 3C0h, the data register is always read back at
address 3C1h.
In one of the extended modes (See "CPU Interface
Register"), the Attribute Controller Index register is
located at address 3C0h and the Attribute Controller
Data register is located at address 3C1h (to allow
word I/O accesses). In another extended mode, the
Attribute Controller can be both read and written at
either 3C0h or 3C1h (EGA compatible mode).
The VGA color palette logic is used to further
modify the video color output following the attribute
controller color registers. The color palette logic is
contained on-chip, however an external color palette
chip may still be used by disabling the internal color
palette (see XR06). DAC logic is provided on-chip
(or in the external 'RAMDAC' chip if used) to
convert the final video output of the color palette to
analog RGB outputs for use in driving a CRT
display.
Attribute Controller and VGA Color Palette Registers
®
Register Name
Attribute Index (for 3C0/3C1h)
Attribute Controller Color Data
Mode Control
Overscan Color
Color Plane Enable
Horizontal Pixel Panning
Pixel Pad
Color Palette Pixel Mask
Color Palette State
Color Palette Read-Mode Index
Color Palette Index (for 3C9h)
Color Palette Data
The Attribute
67
ATTRIBUTE INDEX
REGISTER (ARX)
Read/Write at I/O Address 3C0h
Group 1 Protection
D7 D6 D5 D4 D3 D2 D1 D0
Attribute Controller and Color Palette Registers
4-0
7-6
5
00-FFh
00-0Fh
Index
10h
11h
12h
13h
14h
Attribute Controller Index
These bits point to one of the internal
registers of the Attribute Controller.
Enable Video
Reserved (0)
0 Disable video, allowing the Attribute
1 Enable video, causing the Attribute
Controller Color registers to be
accessed by the CPU
Controller Color registers (AR00-
AR0F) to be inaccessible to the CPU
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
W
R
3C0h/3C1h
3C0h/3C1h
3C0h/3C1h
3C0h/3C1h
3C0h/3C1h
3C0h/3C1h
Address Group Page
3C0h
3C6h
3C7h
3C7h
3C8h
3C9h
I/O
Index to
Attribute Controller
Data Registers
Video Enable
Reserved
Preliminary 65510
Protect
1
1
1
1
1
1
1
6
6
6
6
67
68
68
69
69
70
70
71
71
72
72
72

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