F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 
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ATTRIBUTE CONTROLLER HORIZONTAL
PIXEL PANNING REGISTER (AR13)
Read at I/O Address 3C1h
Write At I/O Address 3C0/1h
Index 13h
Group 1 Protection
D7 D6 D5 D4 D3 D2 D1 D0
Horizontal
Pixel Panning
Reserved
3-0
Horizontal Pixel Panning
These bits select the number of pixels to
shift the display horizontally to the left.
Pixel panning is available in both text and
graphics modes. In 9 pixel/character text
mode, the output can be shifted a maximum
of 9 pixels. In 8 pixel/character text mode
and all graphics modes a maximum shift of
8 pixels is possible. In 256-color mode (out-
put assembler AR10 bit-6 = 1), bit 0 of this
register must be 0 which results in only 4
panning positions per display byte. In Shift
Load 2 and Shift Load 4 modes, register
CR08 provides single pixel resolution for
panning. Panning is controlled as follows:
Number of Pixels Shifted
9-dot
8-dot
AR13
mode
mode
0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
0
7-4
Reserved (0)
Revision 0.7
Attribute Controller and Color Palette Registers
ATTRIBUTE CONTROLLER
PIXEL PAD REGISTER (AR14)
Read at I/O Address 3C1h
Write At I/O Address 3C0/1h
Index 14h
Group 1 Protection
D7 D6 D5 D4 D3 D2 D1 D0
1-0
3-2
7-4
256-color
mode
0
0
1
--
2
1
3
--
4
2
5
--
6
3
7
--
--
--
70
Video bit-4 if AR10 bit-7=1
Video bit-5 if AR10 bit-7=1
Video bit-6 if not 256-color
Video bit-7 if not 256-color
Reserved
Video Bits 5-4
These bits are output as video bits 5 and 4
when AR10 bit-7 = 1. They are disabled in
the 256 color mode.
Video Bits 7-6
These bits are output as video bits 7 and 6 in
all modes except 256-color mode.
Reserved (0)
Preliminary 65510