F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 
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SINGLE/LOW MAP REGISTER (XR10)
Read/Write at I/O Address 3B7h/3D7h
Index 10h
D7 D6 D5 D4 D3 D2 D1 D0
Single or Lower Map
Base address bits 19-12
This register effects CPU memory address mapping.
7-0
Single / Low Map Base Address Bits 17-
10
These bits define the base address in single
map mode (XR0B bit-1 = 0), or the lower
map base address in dual map mode (XR0B
bit-1 = 1). The memory map starts on a 1K
boundary in planar modes and on a 4K
boundary in packed pixel modes. In case of
dual mapping, this register controls the CPU
window into display memory based on the
contents of GR06 bits 3-2 as follows:
GR06
Bits 3-2 Low Map
00
A0000-AFFFF
01
A0000-A7FFF
10
B0000-B7FFF Single
only
11
B8000-BFFFF Single
only
Revision 0.7
HIGH MAP REGISTER (XR11)
Read/Write at I/O Address 3B7h/3D7h
Index 11h
D7 D6 D5 D4 D3 D2 D1 D0
This register effects CPU memory address mapping.
7-0
High Map Base Address Bits 17-10
These bits define the Higher Map base
address in dual map modes (XR0B bit-
1=1). The memory map starts on a 1K
boundary in planar modes and on a 4K
boundary in packed pixel modes. This
register controls the CPU window into
display memory based on the contents of
GR06 bits 3-2 as follows:
GR06 bits 3-2
mapping
mapping
79
Extension Registers
Higher Map
Base address bits 19-12
High Map
00
B0000-BFFFF
01
A8000-AFFFF
10
Don't care
11
Don't care
Preliminary 65510