F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 
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Page 97/154:

POWER DOWN CONTROL REGISTER

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POWER DOWN CONTROL REGISTER

(XR52)
Read/Write at I/O Address 3B7h/3D7h
D7 D6 D5 D4 D3 D2 D1 D0
FP Normal Refresh Count
Panel Off Mode
Reserved
Panel Off Control 1
Reserved
Reserved
2-0
FP Normal Refresh Count
These bits are effective for flat panel only.
They specify the number of memory re-
fresh cycles to be performed per scanline.
A minimum value of 1 should be
programmed in this register.
3
Panel Off Mode
This bit provides a software alternative to
enter Panel Off mode.
0 Normal mode (default on reset)
1 Panel Off mode
In Panel Off mode, the FP display memory
interface is inactive but CPU interface and
display memory refresh are still active.
4
Reserved
5
Panel Off Control Bit
This bit is effective only in Panel Off mode
(XR52 bit-3 = 1).
0 Video data (P0-P7) and flat panel
timing and control signals (FLM, LP,
DE, and SHFCLK) are driven.
1 Video data (P0-P7) and flat panel
timing and control signals (FLM, LP,
DE and SHFCLK) are Tri-Stated.
6
Reserved (Must be programmed to 1)
7
Reserved
Revision 0.7
FP FRC OPTION REGISTER (XR53)
Read/Write at I/O Address 3B7h/3D7h
Index 53h
D7 D6 D5 D4 D3 D2 D1 D0
0
Reserved
1
Reserved
2
FRC Option 1
3
FRC Option 2
5-4
Reserved
6
M Signal Control
This signal controls the output on pin 63
(T65510) or pin 65 (F65510), whether it is
the M signal to the panel or BLANK/
signal to the panel
0 Pin 63 (T65510) or pin 65 (F65510)
outputs M Signal (ACDCLK)
1 Pin 63 (T65510) or pin 65 (F65510)
outputs BLANK/ signal
7
Reserved
93
Extension Registers
Reserved
Reserved
FRC Option 1
FRC Option 2
Reserved
M Signal Control
Reserved
Preliminary 65510