21150-AB

Manufacturer Part Number21150-AB
DescriptionCommunications, Transparent PCI-to-PCI Bridge
ManufacturerIntel Corporation
21150-AB datasheet
 

Specifications of 21150-AB

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21150
DIGITAL recommends using an equivalent amount of etch on the board for all secondary
clocks, to minimize skew between them, and a maximum delay of the etch of 2 ns.
DIGITAL recommends terminating or disabling unused secondary clock outputs to reduce
power dissipation and noise in the system.
11.3
Disabling Unused Secondary Clock Outputs
When secondary clock outputs are not used, both gpio<3:0> and msk_in can be used to clock in a
serial mask that selectively tristates secondary clock outputs.
uses the gpio pins and the msk_in signal to input this data stream.
After the serial mask has been shifted into the 21150, the value of the mask is readable and
modifiable in the secondary clock disable mask register. When the mask is modified by a
configuration write operation to this register, the new clock mask disables the appropriate
secondary clock outputs within a few cycles. This feature allows software to disable or enable
secondary clock outputs based on the presence of option cards, and so on.
The 21150 delays deasserting the secondary reset signal, s_rst_l, until the serial clock mask has
been completely shifted in and the secondary clocks have been disabled or enabled, according to
the mask. The delay between p_rst_l deassertion and s_rst_l deassertion is approximately 23 cycles
(46 cycles if s_clk is operating at 66 MHz).
96
Section 10.2
describes how the 21150
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