21150-AB

Manufacturer Part Number21150-AB
DescriptionCommunications, Transparent PCI-to-PCI Bridge
ManufacturerIntel Corporation
21150-AB datasheet
 

Specifications of 21150-AB

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Dword Bit
Upper 32 prefetchable
31:0
memory base address
<63:32>
15.1.24
Prefetchable Memory Limit Address Upper 32 Bits Register—Offset
2Ch
This section describes the prefetchable memory limit address upper 32 bits register.
This register must be initialized by configuration software.
Dword address = 2Ch
Byte enable p_cbe_l<3:0> = 0000b
Dword Bit
Upper 32 prefetchable
31:0
memory limit address
<63:32>
15.1.25
I/O Base Address Upper 16 Bits Register—Offset 30h
This section describes the I/O base address upper 16 bits register.
This register must be initialized by configuration software.
Dword address = 30h
Byte enable p_cbe_l<3:0> = xx00b
Dword Bit
I/O base address upper
15:0
16 bits <31:16>
Preliminary
Datasheet
Name
R/W
Defines the upper 32 bits of a 64-bit bottom
address of an address range used by the
21150 to determine when to forward memory
read and write transactions from one interface
R/W
to the other. The memory address range
adheres to 1MB alignment and granularity.
Reset value: 0.
Name
R/W
Defines the upper 32 bits of a 64-bit top
address of an address range used by the
21150 to determine when to forward memory
read and write transactions from one interface
to the other. Extra read transactions should
R/W
have no side effects. The memory address
range adheres to 1MB alignment and
granularity.
Reset value: 0.
Name
R/W
Defines the upper 16 bits of a 32-bit bottom
address of an address range used by the
21150 to determine when to forward I/O
transactions from one interface to the other.
R/W
The I/O address range adheres to 4KB
alignment and granularity.
Reset value: 0.
21150
Description
Description
Description
117