21150-AB Intel Corporation, 21150-AB Datasheet - Page 137

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21150-AB

Manufacturer Part Number
21150-AB
Description
Communications, Transparent PCI-to-PCI Bridge
Manufacturer
Intel Corporation
Datasheet

Specifications of 21150-AB

Case
QFP
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15.2.5
Preliminary
Datasheet
gpio Output Data Register—Offset 65h
This section describes the gpio output data register.
Dword address = 64h
Byte enable p_cbe_l<3:0> = xx0xb
5
6
7
11:8
15:12
Dword Bit
Dword Bit
Delayed write nondelivery
Delayed read—no data
from target
Reserved
GPIO output write-1-to-
clear
GPIO output write-1-to-
set
Name
Name
R
R/W
R/W
R/W1TC
R/W1TC
R/W
R/W
Controls the 21150’s ability to assert p_serr_l
when it is unable to deliver delayed write data
after 2
When 0—Signal p_serr_l is asserted if this
event occurs and the SERR# enable bit in the
command register is set.
When 1—Signal p_serr_l is not asserted if this
event occurs.
Reset value: 0.
Controls the 21150’s ability to assert p_serr_l
when it is unable to transfer any read data from
the target after 2
When 0—Signal p_serr_l is asserted if this
event occurs and the SERR# enable bit in the
command register is set.
When 1—Signal p_serr_l is not asserted if this
event occurs.
Reset value: 0.
Reserved. Returns 0 when read.
The gpio<3:0> pin output data write-1-to-clear.
Writing 1 to any of these bits drives the
corresponding bit low on the gpio<3:0> bus if it
is programmed as bidirectional. Data is driven
on the PCI clock cycle following completion of
the configuration write to this register. Bit
positions corresponding to gpio pins that are
programmed as input only are not driven.
Writing 0 to these bits has no effect. When
read, reflects the last value written.
Reset value: 0.
The gpio<3:0> pin output data write-1-to-set.
Writing 1 to any of these bits drives the
corresponding bit high on the gpio<3:0> bus if
it is programmed as bidirectional. Data is
driven on the PCI clock cycle following
completion of the configuration write to this
register. Bit positions corresponding to gpio
pins that are programmed as input only are not
driven. Writing 0 to these bits has no effect.
When read, reflects the last value written.
Reset value: 0.
24
attempts.
24
Description
Description
attempts.
21150
129

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