21150-AB

Manufacturer Part Number21150-AB
DescriptionCommunications, Transparent PCI-to-PCI Bridge
ManufacturerIntel Corporation
21150-AB datasheet
 


Specifications of 21150-AB

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21150
Table 35. Configuration Register Values After Reset (Sheet 2 of 2)
Byte Address
26–27h
28–2Bh
2C–2Fh
30–31h
32–33h
34–35h
36–37h
3Dh
3E–3Fh
40h
41h
42–43h
64h
65h
66h
67h
68–69h
6Ah
DCh
DDh
DE–DFh
E0–E1h
E2h
E3h
1.
Dependent on revision of device.
2.
The value of this register is dependent upon the serial clock disable shift function that occurs during
secondary bus reset.
3.
Reserved in the 21150-AA.
134
Register Name
Prefetchable memory limit
Prefetchable memory base upper 32 bits
Prefetchable memory limit upper 32 bits
I/O base upper 16 bits
I/O limit upper 16 bits
Subsystem vendor ID–21150-AA only
ECP pointer
Subsystem ID–21150-AA only
Reserved
Interrupt pin
Bridge control
Chip control
Diagnostic control
Arbiter control
p_serr_l event disable
gpio output data
gpio output enable control
gpio input data
2
Secondary clock control
p_serr_l status
3
Power management capability ID
3
Next item pointer
Power management capabilities register
3
Power management control and status
3
PPB support extensions
3
Power management data register
Reset Value
0001h
00000000h
00000000h
0000h
0000h
0000h
00DCh
0000h
00h
0000h
00h
00h
0200h
00h
00h
00h
00h
00h
01h
00h
3
01h
00h
00h (bpcce = 0)
C0h (bpcce = 1)
00h
Preliminary
Datasheet