21150-AB

Manufacturer Part Number21150-AB
DescriptionCommunications, Transparent PCI-to-PCI Bridge
ManufacturerIntel Corporation
21150-AB datasheet
 

Specifications of 21150-AB

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Instruction Register

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21150
16.4

Instruction Register

The 5-bit instruction register selects the test modes and features.The instruction register bits are
interpreted as instructions, as shown in
of the boundary-scan and bypass registers.
Table 37
describes the 21150’s instructions.
Table 37. JTAG Instruction Registers

Instruction Register

Contents
00000
00001
00010
00011
00100
00101
00110--11111
The instruction register is loaded through the tdi pin. The instruction register has a shift-in stage
from which the instruction is then loaded in parallel.
16.5
Bypass Register
The bypass register is a 1-bit shift register that provides a means for effectively bypassing the
JTAG test logic through a single-bit serial connection through the chip from tdi to tdo. At board-
level testing, this helps reduce overall length of the scan ring.
16.6
Boundary-Scan Register
The boundary-scan register is a single-shift register-based path formed by boundary-scan cells
placed at the chip’s signal pins. The register is accessed through the JTAG port’s tdi and tdo pins.
136
Table
37. The instructions select and control the operation
Instruction Name (Test
Test Register Selected
Mode or State)
EXTEST
Boundary-scan
SAMPLE
Boundary-scan
BSROSC
Boundary-scan
BSRDLY
Boundary-scan
CLAMP
Bypass
HIGHZ
Bypass
BYPASS
Bypass
Operation
External test (drives pins
from the boundary-scan
register)
Samples I/O
Ring oscillates the
boundary-scan register
Configures the boundary-
scan register for
propagation delay
measurement
Drives pins from the
boundary-scan
register and selects the
bypass register for shifts
Tristates all output and
I/O pins except the tdo
pin
Selects the bypass
register for shifts
Preliminary
Datasheet