21150-AB

Manufacturer Part Number21150-AB
DescriptionCommunications, Transparent PCI-to-PCI Bridge
ManufacturerIntel Corporation
21150-AB datasheet
 


Specifications of 21150-AB

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Page 15/164:

Signal Pins

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Signal Pins

This chapter provides detailed descriptions of the 21150 signal pins, grouped by function.
Table 2
describes the signal pin functional groups, and the following sections describe the signals
in each group.
Table 2.

Signal Pins

Function
Primary PCI bus
interface signal pins
Secondary PCI bus
interface signal pins
Secondary PCI bus
arbiter signal pins
General-purpose I/O
interface signal pins
Clock signal pins
Reset signal pins
Miscellaneous signal
pins
JTAG signal pins
Table 3
defines the signal type abbreviations used in the signal tables:
Table 3.
Signal Types
Signal Type
I
O
TS
STS
OD
Note: The _l signal name suffix indicates that the signal is asserted when it is at a low voltage level and
corresponds to the # suffix in the PCI Local Bus Specification. If this suffix is not present, the
signal is asserted when it is at a high voltage level.
Preliminary
Datasheet
Description
All PCI pins required by the Revision 1.1 of the PCI-to-PCI Bridge
Architecture Specification .
All PCI pins required by the Revision 1.1 of the PCI-to-PCI Bridge
Architecture Specification .
Nine request/grant pairs of pins for the secondary PCI bus.
An arbiter enable control pin.
Four general-purpose pins.
Two clock inputs (one for each PCI interface).
Ten clock outputs (for nine external secondary PCI bus devices and also for
the 21150).
A primary interface reset input.
A secondary interface reset output.
An input-only pin used to disable secondary clock outputs.
Two input voltage signaling level pins.
Three pins controlling 66 MHz operation.
All JTAG pins required by IEEE standard 1149.1.
Description
Standard input only.
Standard output only.
Tristate bidirectional.
Sustained tristate. Active low signal must be pulled high for one cycle when
deasserting.
Standard open drain.
21150
7