RJ80530KZ933512

Manufacturer Part NumberRJ80530KZ933512
DescriptionLow Voltage Pentium III Processor with 512 kB L2 Cache
ManufacturerIntel Corporation
RJ80530KZ933512 datasheet
 


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Page 12/74:

Normal State State

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®
®
LV Intel
Pentium
III Processor 512K
Figure 2. Stop Clock State Machine
2. Auto HALT Power Down State
BCLK running
Snoops and interrupts allowed
Snoop
Event
Occurs
4. HALT/Grant Snoop State
BCLK running
Service snoops to caches
For the processor to fully realize the low current consumption of the Stop-Grant and Sleep states, a
Model Specific Register (MSR) bit must be set. For the MSR at 02AH (Hex), bit 26 must be set to
a ‘1’ (this is the power on default setting) for the processor to stop all internal clocks during these
modes. For more information, see the Intel Architecture Software Developer’s Manual, Volume 3:
System Programming Guide.
2.5.1
Normal State—State 1
This is the normal operating state for the processor.
2.5.2
AutoHALT Power Down State—State 2
AutoHALT is a low power state that is entered when the processor executes the HALT instruction.
The processor transitions to the Normal state upon the occurrence of SMI#, INIT#, or LINT[1:0]
(NMI, INTR). RESET# causes the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or
the AutoHALT Power Down state. See the Intel Architecture Software Developer's Manual,
Volume III: System Programmer's Guide for more information.
12
HALT Instruction and
HALT Bus Cycle Generated
INIT#, BINIT#, INTR, NMI,
SMI#, RESET#
Snoop
Event
Serviced
Snoop Event Occurs
Snoop Event Serviced
1. Normal State
Normal execution
STPCLK#
STPCLK#
De-asserted
Asserted
3. Stop Grant State
BCLK running
Snoops and interrupts allowed
SLP#
SLP#
Asserted
De-asserted
5. Sleep State
BCLK runing
No snoops or interrupts
allowed
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