RJ80530KZ933512

Manufacturer Part NumberRJ80530KZ933512
DescriptionLow Voltage Pentium III Processor with 512 kB L2 Cache
ManufacturerIntel Corporation
RJ80530KZ933512 datasheet
 


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Page 37/74:

Setup and Hold Timings

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Figure 14. Setup and Hold Timings
CLK
Signal
NOTES:
T
=
T 8, T12, T27 (Setup Time)
s
T
= T9, T13, T28 (Hold Time)
h
V =
V
for AGTL signals; 1.0 V for CMOS, APIC, and TAP signals
REF
Vc = Crossing point of BCLK rising edge and BCLK# falling edge for BCLK references (differential clock)
= 1.25 V (single-ended Clock)
Figure 15. Cold/Warm Reset and Configuration Timings
BCLK
RESET#
Configuration
(A[15:5], BREQ0#,
(A[15:5],BR0#
FLUSH#, INIT#,
PICD0)
PICD[1:0]
AGTL/non-AGTL
outputs
Non-configuration
inputs
NOTES:
T
= T9 (AGTL Input Hold Time)
t
T
= T8 (AGTL Input Setup Time)
u
T
= T10 (RESET# Pulse Width)
v
T
= T16 (Reset Configuration Signals (A[15:5]#, BR0#, FLUSH#, INIT#, PICD0) Setup Time)
w
T
=
T17 (Reset Configuration Signals (A[15:5]#, BR0#, FLUSH#, INIT#, PICD0) Hold Time)
x
T
= T18D (RESET# inactive to Valid Outputs)
y
T
= T18E (RESET# inactive to Drive Signals)
z
Vc = Crossing point of BCLK rising edge and BCLK# falling edge (differential clock)
= 1.25 V (single-ended clock)
Datasheet
®
LV Intel
Pentium
Vc
T
Ts
h
V
Valid
V
C
T
u
T
t
T
v
T
w
Valid
®
III Processor 512K
D0005-00
V
T
x
T
y
Valid
T
z
Active
D0006-02
37