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AT32UC3C0512CAU
AT32UC3C0512CAU | |
|---|---|
| Manufacturer Part Number | AT32UC3C0512CAU |
| Manufacturer | Atmel Corporation |
| AT32UC3C0512CAU datasheets |
|
Availability: In stock
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Warranty: 60 days
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- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
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Specifications of AT32UC3C0512CAU | |||
|---|---|---|---|
| Flash (kbytes) | 512 Kbytes | Pin Count | 144 |
| Max. Operating Frequency | 66 MHz | Cpu | 32-bit AVR |
| # Of Touch Channels | 32 | Hardware Qtouch Acquisition | No |
| Max I/o Pins | 123 | Ext Interrupts | 144 |
| Usb Transceiver | 1 | Quadrature Decoder Channels | 2 |
| Usb Speed | Full Speed | Usb Interface | Device + OTG |
| Spi | 7 | Twi (i2c) | 3 |
| Uart | 5 | Can | 2 |
| Lin | 5 | Ssc | 1 |
| Ethernet | 1 | Graphic Lcd | No |
| Video Decoder | No | Camera Interface | No |
| Adc Channels | 16 | Adc Resolution (bits) | 12 |
| Adc Speed (ksps) | 2000 | Analog Comparators | 4 |
| Resistive Touch Screen | No | Dac Channels | 4 |
| Dac Resolution (bits) | 12 | Temp. Sensor | No |
| Crypto Engine | No | Sram (kbytes) | 68 |
| Self Program Memory | YES | External Bus Interface | 1 |
| Dram Memory | sdram | Nand Interface | No |
| Picopower | No | Temp. Range (deg C) | -40 to 85 |
| I/o Supply Class | 3.0 to 3.6 or 4.5 to 5.5 | Operating Voltage (vcc) | 3.0 to 3.6 or 4.5 to 5.5 |
| Fpu | Yes | Mpu / Mmu | Yes / No |
| Timers | 6 | Output Compare Channels | 22 |
| Input Capture Channels | 12 | Pwm Channels | 20 |
| 32khz Rtc | Yes | Calibrated Rc Oscillator | Yes |
AT32UC3A0128 PDF datasheetAT32UC3A0128 PDF datasheet #2AT32UC3A0128AU PDF datasheet #3AT32UC3C0128C PDF datasheet #4AT32UC3C0128C PDF datasheet #5
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PrevNext
7.9.3
USART in SPI Mode Timing
7.9.3.1
Master mode
Figure 7-6.
Figure 7-7.
Table 7-46.
USART in SPI Mode Timing, Master Mode
Symbol
Parameter
USPI0
MISO setup time before SPCK rises
USPI1
MISO hold time after SPCK rises
USPI2
SPCK rising to MOSI delay
USPI3
MISO setup time before SPCK falls
USPI4
MISO hold time after SPCK falls
USPI5
SPCK falling to MOSI delay
Note:
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
t
t
2. Where:
=
SAMPLE
SPCK
32117CS–AVR-08/11
USART in SPI Master Mode With (CPOL= CPHA= 0) or (CPOL= CPHA= 1)
SPCK
MISO
MOSI
USPI2
USART in SPI Master Mode With (CPOL= 0 and CPHA= 1) or (CPOL= 1 and
CPHA= 0)
SPCK
MISO
MOSI
USPI5
(1)
Conditions
external
capacitor =
40pF
t
⎛
⎞
1
SPCK
×
t
-- -
–
⎝
------------------------------------
⎠
CLKUSART
×
t
2
2
CLKUSART
AT32UC3C
USPI0
USPI1
USPI3
USPI4
Min
Max
(2)
26+ t
SAMPLE
0
11
(2)
26+ t
SAMPLE
0
11.5
Units
ns
ns
ns
ns
ns
ns
72
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