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AT32UC3C0512CAU
AT32UC3C0512CAU | |
|---|---|
| Manufacturer Part Number | AT32UC3C0512CAU |
| Manufacturer | Atmel Corporation |
| AT32UC3C0512CAU datasheets |
|
Availability: In stock
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Warranty: 60 days
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Specifications of AT32UC3C0512CAU | |||
|---|---|---|---|
| Flash (kbytes) | 512 Kbytes | Pin Count | 144 |
| Max. Operating Frequency | 66 MHz | Cpu | 32-bit AVR |
| # Of Touch Channels | 32 | Hardware Qtouch Acquisition | No |
| Max I/o Pins | 123 | Ext Interrupts | 144 |
| Usb Transceiver | 1 | Quadrature Decoder Channels | 2 |
| Usb Speed | Full Speed | Usb Interface | Device + OTG |
| Spi | 7 | Twi (i2c) | 3 |
| Uart | 5 | Can | 2 |
| Lin | 5 | Ssc | 1 |
| Ethernet | 1 | Graphic Lcd | No |
| Video Decoder | No | Camera Interface | No |
| Adc Channels | 16 | Adc Resolution (bits) | 12 |
| Adc Speed (ksps) | 2000 | Analog Comparators | 4 |
| Resistive Touch Screen | No | Dac Channels | 4 |
| Dac Resolution (bits) | 12 | Temp. Sensor | No |
| Crypto Engine | No | Sram (kbytes) | 68 |
| Self Program Memory | YES | External Bus Interface | 1 |
| Dram Memory | sdram | Nand Interface | No |
| Picopower | No | Temp. Range (deg C) | -40 to 85 |
| I/o Supply Class | 3.0 to 3.6 or 4.5 to 5.5 | Operating Voltage (vcc) | 3.0 to 3.6 or 4.5 to 5.5 |
| Fpu | Yes | Mpu / Mmu | Yes / No |
| Timers | 6 | Output Compare Channels | 22 |
| Input Capture Channels | 12 | Pwm Channels | 20 |
| 32khz Rtc | Yes | Calibrated Rc Oscillator | Yes |
AT32UC3A0128 PDF datasheetAT32UC3A0128 PDF datasheet #2AT32UC3A0128AU PDF datasheet #3AT32UC3C0128C PDF datasheet #4AT32UC3C0128C PDF datasheet #5
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Table 7-54.
SMC Read Signals with no Hold Settings
Symbol
Parameter
SMC
Data setup before NRD high
19
SMC
Data hold after NRD high
20
SMC
Data setup before NCS high
21
SMC
Data hold after NCS high
22
Note:
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
Table 7-55.
SMC Write Signals with Hold Settings
Symbol
Parameter
SMC
Data Out valid before NWE high
23
SMC
Data Out valid after NWE high
24
SMC
NWE high to NBS0/A0 change
25
SMC
NWE high to NBS2/A1 change
29
SMC
NWE high to A2 - A25 change
31
SMC
NWE high to NCS inactive
32
SMC
NWE pulse width
33
SMC
Data Out valid before NCS high
34
SMC
Data Out valid after NCS high
35
SMC
NCS high to NWE inactive
36
Note:
1. These values are based on simulation and characterization of other AVR microcontrollers manufactured in the same pro-
cess technology. These values are not covered by test limits in production.
2. hold length = total cycle duration - setup duration - pulse duration. “hold length” is for “ncs wr hold length” or “nwe hold
length”
32117CS–AVR-08/11
(1)
Conditions
NRD Controlled (READ_MODE = 1)
V
VDD
drive strength of the pads set to the lowest,
external capacitor = 40pF
NRD Controlled (READ_MODE = 0)
V
VDD
drive strength of the pads set to the lowest,
external capacitor = 40pF
(1)
Conditions
NRD Controlled (READ_MODE = 1)
(2)
(2)
V
= 3.0V,
VDD
(2)
drive strength of the pads set
to the lowest,
(2)
external capacitor = 40pF
(2)
NRD Controlled (READ_MODE = 0)
V
= 3.0V,
VDD
(2)
drive strength of the pads set
to the lowest,
(2)
external capacitor = 40pF
AT32UC3C
Min
= 3.0V,
32.5
= 3.0V,
28.5
Min
(nwe pulse length - 1) * t
CPSMC
nwe pulse length * t
CPSMC
nwe pulse length * t
CPSMC
nwe pulse length * t
CPSMC
nwe pulse length * t
CPSMC
(nwe hold pulse - ncs wr hold length) *
t
- 2.5
CPSMC
nwe pulse length * t
CPSMC
(ncs wr pulse length - 1) * t
CPSMC
ncs wr hold length * t
CPSMC
(ncs wr hold length - nwe hold length) *
t
- 2
CPSMC
Units
ns
0
ns
0
Units
- 1.4
- 4.7
- 2.7
- 0.7
ns
- 6.8
- 0.2
- 2.2
- 5.1
ns
82
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